[U-Boot] [PATCH 1/1] am33xx: add CONFIG_SYS_NAND_DEVICE_WIDTH to determine NAND device bus-width

Scott Wood scottwood at freescale.com
Tue Oct 1 21:42:46 CEST 2013


On Sat, 2013-09-28 at 06:24 +0000, Gupta, Pekon wrote:
> > From: Scott Wood [mailto:scottwood at freescale.com]
> > 
> > On Fri, 2013-09-27 at 04:18 +0000, Gupta, Pekon wrote:
> > > Apart from SPL, CONFIG_SYS_NAND_DEVICE_WIDTH also be useful for
> > > (1) drivers which do not use CONFIG_SYS_NAND_ONFI_DETECTION, where
> > >      code for reading on-chip ONFI parameters is not enabled in nand_base.c
> > > (2) non ONFI compatible NAND devices.
> > 
> > Unlikely, given that they've all managed to work without this so far.
> > E.g. eLBC and IFC hardcode this information on a per-chip basis in the
> > #defines that hold values for config registers, and prior to this patch
> > omap_gpmc had code to read a config register (regardless of where it
> > originally got set).
> > 
> (1) drivers/mtd/nand/fsl_ifc_spl.c
> They are doing same way as OMAP used to. They are also using controller
> configurations to tell driver about the]NAND bus-width 
> "port_size = (cspr & CSPR_PORT_SIZE_16) ? 16 : 8;"

Yes.  Note that CSPR is set per-chip.

> (2) drivers/mtd/nand/fsl_elbc_spl.c
> They are doing incomplete check. Rather they are not caring for x16 device

Right, I forgot that eLBC doesn't support 16-bit NAND (hardware limitation).

> So CONFIG_SYS_NAND_DEVICE_WIDTH should help them also. right ?

How would it help?

> So can this new CONFIG_xx be accepted ?

Only for SPL usage.

> > > > It looked
> > > > like you were removing the code that does dynamic detection, which
> > would
> > > > also affect non-SPL.
> > > >
> > > >  > -	/* If we are 16 bit dev, our gpmc config tells us that */
> > > > >  -	if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000)
> > >
> > > omap_gpmc.c never had dynamic detection support. Above gpmc_config
> > bit
> > > which is used to tell whether device is x16 or x8, gets actually hard-coded in
> > > gpmc_init(). Thus it was actually a mechanism to pass hard-coded bus-
> > width
> > > information to nand driver.
> > > Refer: arch/arm/cpu/armv7/am33xx/mem.c : gpmc_init()
> > >
> > > So, instead of hacking the gpmc_init() everytime for different devices,
> > > this patch introduces a generic CONFIG which can be used everywhere.
> > 
> > It looks like you do more NAND config in gpmc_init() than just setting
> > this one bit, so I don't think you save anything here.
> > 
> > BTW, do you not need to set this bit in the config register for the
> > hardware to work in the SPL case?
> > 
> Yes, I'm not changing the default configs for GPMC in gpmc_init(), 
> because they are ok for x8 device. I'm just overriding them again during
> board_nand_init() if CONFIG_SYS_NAND_DEVICE_WIDTH == x16 device.

Is this due to wanting to do identification as x8?

-Scott





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