[U-Boot] [PATCH 2/3] arm: kzm9g: Update to new I2C framework

Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj at renesas.com
Thu Oct 17 09:18:31 CEST 2013


Kzm9g uses sh_i2c driver. sh_i2c driver updated to new I2C framwork.
This updates kzm9g to this change.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>

---
 board/kmc/kzm9g/kzm9g.c |  2 +-
 include/configs/kzm9g.h | 31 ++++++++++++++++---------------
 2 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index b669ffe..0ec5e8e 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -289,7 +289,7 @@ void adjust_core_voltage(void)
 {
 	u8 data;
 
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+	i2c_init(CONFIG_SYS_I2C_SH_SPEED0, CONFIG_SYS_I2C_SLAVE);
 	data = 0x35;
 	i2c_set_bus_num(0);
 	i2c_write(0x40, 3, 1, &data, 1);
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 6323050..9a3d2f8 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -141,21 +141,22 @@
 
 /* I2C */
 #define CONFIG_CMD_I2C
-#define CONFIG_SH_I2C 1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SH
+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
+#define CONFIG_SYS_I2C_SH_BASE0	0xE6820000
+#define CONFIG_SYS_I2C_SH_SPEED0	100000
+#define CONFIG_SYS_I2C_SH_BASE1	0xE6822000
+#define CONFIG_SYS_I2C_SH_SPEED1	100000
+#define CONFIG_SYS_I2C_SH_BASE2	0xE6824000
+#define CONFIG_SYS_I2C_SH_SPEED2	100000
+#define CONFIG_SYS_I2C_SH_BASE3	0xE6826000
+#define CONFIG_SYS_I2C_SH_SPEED3	100000
+#define CONFIG_SYS_I2C_SH_BASE4	0xE6828000
+#define CONFIG_SYS_I2C_SH_SPEED4	100000
 #define CONFIG_SH_I2C_8BIT
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS  (5)
-#define CONFIG_SYS_I2C_MODULE
-#define CONFIG_SYS_I2C_SPEED    (100000) /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE    (0x7F)
-#define CONFIG_SH_I2C_DATA_HIGH (4)
-#define CONFIG_SH_I2C_DATA_LOW  (5)
-#define CONFIG_SH_I2C_CLOCK     (104000000) /* 104 MHz */
-#define CONFIG_SH_I2C_BASE0     (0xE6820000)
-#define CONFIG_SH_I2C_BASE1     (0xE6822000)
-#define CONFIG_SH_I2C_BASE2     (0xE6824000)
-#define CONFIG_SH_I2C_BASE3     (0xE6826000)
-#define CONFIG_SH_I2C_BASE4     (0xE6828000)
+#define CONFIG_SH_I2C_DATA_HIGH 4
+#define CONFIG_SH_I2C_DATA_LOW  5
+#define CONFIG_SH_I2C_CLOCK     104000000 /* 104 MHz */
 
 #endif /* __KZM9G_H */
-- 
1.8.4.rc3



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