[U-Boot] [PATCH v7 1/5] core support of arm64
FengHua
fenghua at phytium.com.cn
Thu Sep 12 04:10:05 CEST 2013
hi,
The following codes are originated from linux kernel. I am not sure whether license issues exist.
I list the original codes at the bottom. Please check it and give me some advice.
If license issues actually exist I would like to remove it. The exception state push action just should be so.
Best regards,
David
U-boot armv8 implementation:
/*
* Enter Exception.
* This will save the processor state that is X0~X29/LR/SP/ELR/PSTATE
* to the stack frame.
*/
#define EXCEPTION_ENTRY \
sub sp, sp, S_FRAME_SIZE - S_LR ;\
push x28, x29 ;\
push x26, x27 ;\
push x24, x25 ;\
push x22, x23 ;\
push x20, x21 ;\
push x18, x19 ;\
push x16, x17 ;\
push x14, x15 ;\
push x12, x13 ;\
push x10, x11 ;\
push x8, x9 ;\
push x6, x7 ;\
push x4, x5 ;\
push x2, x3 ;\
push x0, x1 ;\
add x21, sp, S_FRAME_SIZE ;\
;\
/* Could be running at EL1 or EL2 */ ;\
mrs x0, CurrentEL ;\
cmp x0, 0x4 ;\
b.eq 1f ;\
cmp x0, 0x8 ;\
b.eq 2f ;\
b 3f ;\
1: mrs x22, elr_el1 ;\
mrs x23, spsr_el1 ;\
mrs x1, esr_el1 ;\
b 3f ;\
2: mrs x22, elr_el2 ;\
mrs x23, spsr_el2 ;\
mrs x1, esr_el2 ;\
3: ;\
stp lr, x21, [sp, S_LR] ;\
stp x22, x23, [sp, S_PC] ;\
mov x0, sp
/*
* Exit Exception.
* This will restore the processor state that is X0~X29/LR/SP/ELR/PSTATE
* from the stack frame and return from exceprion.
*/
#define EXCEPTION_EXIT \
ldp x21, x22, [sp, S_PC] ;\
;\
/* Could be running at EL1 or EL2 */ ;\
mrs x0, CurrentEL ;\
cmp x0, 0x4 ;\
b.eq 1f ;\
cmp x0, 0x8 ;\
b.eq 2f ;\
b 3f ;\
1: msr elr_el1, x21 ;\
msr spsr_el1, x22 ;\
b 3f ;\
2: msr elr_el2, x21 ;\
msr spsr_el2, x22 ;\
3: ;\
pop x0, x1 ;\
pop x2, x3 ;\
pop x4, x5 ;\
pop x6, x7 ;\
pop x8, x9 ;\
pop x10, x11 ;\
pop x12, x13 ;\
pop x14, x15 ;\
pop x16, x17 ;\
pop x18, x19 ;\
pop x20, x21 ;\
pop x22, x23 ;\
pop x24, x25 ;\
pop x26, x27 ;\
pop x28, x29 ;\
ldr lr, [sp], S_FRAME_SIZE - S_LR ;\
eret
Linux kernel implimentation:
.macro kernel_entry, el, regsize = 64
sub sp, sp, #S_FRAME_SIZE - S_LR // room for LR, SP, SPSR, ELR
.if \regsize == 32
mov w0, w0 // zero upper 32 bits of x0
.endif
push x28, x29
push x26, x27
push x24, x25
push x22, x23
push x20, x21
push x18, x19
push x16, x17
push x14, x15
push x12, x13
push x10, x11
push x8, x9
push x6, x7
push x4, x5
push x2, x3
push x0, x1
.if \el == 0
mrs x21, sp_el0
.else
add x21, sp, #S_FRAME_SIZE
.endif
mrs x22, elr_el1
mrs x23, spsr_el1
stp lr, x21, [sp, #S_LR]
stp x22, x23, [sp, #S_PC]
/*
* Set syscallno to -1 by default (overridden later if real syscall).
*/
.if \el == 0
mvn x21, xzr
str x21, [sp, #S_SYSCALLNO]
.endif
/*
* Registers that may be useful after this macro is invoked:
*
* x21 - aborted SP
* x22 - aborted PC
* x23 - aborted PSTATE
*/
.endm
.macro kernel_exit, el, ret = 0
ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
.if \el == 0
ldr x23, [sp, #S_SP] // load return stack pointer
.endif
.if \ret
ldr x1, [sp, #S_X1] // preserve x0 (syscall return)
add sp, sp, S_X2
.else
pop x0, x1
.endif
pop x2, x3 // load the rest of the registers
pop x4, x5
pop x6, x7
pop x8, x9
msr elr_el1, x21 // set up the return data
msr spsr_el1, x22
.if \el == 0
msr sp_el0, x23
.endif
pop x10, x11
pop x12, x13
pop x14, x15
pop x16, x17
pop x18, x19
pop x20, x21
pop x22, x23
pop x24, x25
pop x26, x27
pop x28, x29
ldr lr, [sp], #S_FRAME_SIZE - S_LR // load LR and restore SP
eret // return to kernel
.endm
.macro get_thread_info, rd
mov \rd, sp
and \rd, \rd, #~((1 << 13) - 1) // top of 8K stack
.endm
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