[U-Boot] [PATCH v4 35/36] sf: spi_flash cleanups
Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-teki at xilinx.com
Tue Sep 24 20:20:12 CEST 2013
More cleanups on spi_flash side:
- Removed unneeded comments.
- Rearranged macros in proper location.
- Rearranged func declerations
- Renamed few function names.
- Added License headers.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
---
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/Makefile | 4 +-
drivers/mtd/spi/spi_flash_internal.h | 131 +++++++++++++++++++++--------------
drivers/mtd/spi/spi_flash_ops.c | 6 +-
drivers/mtd/spi/spi_flash_probe.c | 14 ++--
include/spi_flash.h | 34 ++-------
5 files changed, 95 insertions(+), 94 deletions(-)
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 5678134..0fa867d 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -17,8 +17,8 @@ endif
ifdef CONFIG_CMD_SF
COBJS-y += spi_flash.o
endif
-COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
-COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
+COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
COBJS := $(COBJS-y)
diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h
index a346ae6..dcf54fa 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -2,38 +2,51 @@
* SPI flash internal definitions
*
* Copyright (C) 2008 Atmel Corporation
+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
+ *
+ * Licensed under the GPL-2 or later.
*/
-/* Common parameters -- kind of high, but they should only occur when there
- * is a problem (and well your system already is broken), so err on the side
- * of caution in case we're dealing with slower SPI buses and/or processors.
- */
-#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
-#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
-#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
+#ifndef _SPI_FLASH_INTERNAL_H_
+#define _SPI_FLASH_INTERNAL_H_
-/* Common commands */
-#define CMD_READ_ID 0x9f
+/* SPI flash CFI Manufacture ID's */
+#define SPI_FLASH_CFI_MFR_SPANSION 0x01
+#define SPI_FLASH_CFI_MFR_ATMEL 0x1f
+#define SPI_FLASH_CFI_MFR_SST 0xbf
+#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
-#define CMD_READ_ARRAY_SLOW 0x03
-#define CMD_READ_ARRAY_FAST 0x0b
+#define SPI_FLASH_16MB_BOUN 0x1000000
+
+/* SECT flags */
+#define SECT_4K (1 << 0)
+#define SECT_32K (1 << 1)
+#define E_FSR (1 << 2)
+/* Erase commands */
+#define CMD_ERASE_4K 0x20
+#define CMD_ERASE_32K 0x52
+#define CMD_ERASE_CHIP 0xc7
+#define CMD_ERASE_64K 0xd8
+
+/* Write commands */
#define CMD_WRITE_STATUS 0x01
-#define CMD_PAGE_PROGRAM 0x02
#define CMD_WRITE_DISABLE 0x04
#define CMD_READ_STATUS 0x05
+#define CMD_WRITE_ENABLE 0x06
+#define CMD_QUAD_PAGE_PROGRAM 0x32
#define CMD_READ_CONFIG 0x35
#define CMD_FLAG_STATUS 0x70
-#define CMD_WRITE_ENABLE 0x06
-#define CMD_ERASE_4K 0x20
-#define CMD_ERASE_32K 0x52
-#define CMD_ERASE_64K 0xd8
-#define CMD_ERASE_CHIP 0xc7
-#define SPI_FLASH_16MB_BOUN 0x1000000
+/* Read commands */
+#define CMD_READ_ARRAY_SLOW 0x03
+#define CMD_READ_DUAL_OUTPUT_FAST 0x3b
+#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
+#define CMD_READ_DUAL_IO_FAST 0xbb
+#define CMD_READ_ID 0x9f
-#ifdef CONFIG_SPI_FLASH_BAR
/* Bank addr access commands */
+#ifdef CONFIG_SPI_FLASH_BAR
# define CMD_BANKADDR_BRWR 0x17
# define CMD_BANKADDR_BRRD 0x16
# define CMD_EXTNADDR_WREAR 0xC5
@@ -45,6 +58,21 @@
#define STATUS_QEB 0x02
#define STATUS_PEC 0x80
+/* Flash timeout values */
+#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
+#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
+#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
+
+/* SST specific */
+#ifdef CONFIG_SPI_FLASH_SST
+# define SST_WP 0x01 /* Supports AAI word program */
+# define CMD_SST_BP 0x02 /* Byte Program */
+# define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
+
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+ const void *buf);
+#endif
+
/* Send a single-byte command to the device and read the response */
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
@@ -55,9 +83,6 @@ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len);
-int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
- size_t len, void *data);
-
/*
* Send a multi-byte command to the device followed by (optional)
* data. Used for programming the flash array, etc.
@@ -65,46 +90,34 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
const void *data, size_t data_len);
-/*
- * Write the requested data out breaking it up into multiple write
- * commands as needed per the write size.
- */
-int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
- size_t len, const void *buf);
-#ifdef CONFIG_SPI_FLASH_SST
-int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
- const void *buf);
-#endif
+/* Flash erase(sectors) operation, support all possible erase commands */
+int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
-/*
- * Enable writing on the SPI flash.
- */
+/* Program the status register */
+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
+
+/* Set quad enbale bit */
+int spi_flash_set_qeb(struct spi_flash *flash);
+
+/* Enable writing on the SPI flash */
static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
{
return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
}
-/*
- * Disable writing on the SPI flash.
- */
+/* Disable writing on the SPI flash */
static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
{
return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
}
-/* Program the status register. */
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
-
-/* Set quad enbale bit */
-int spi_flash_set_qeb(struct spi_flash *flash);
-
/*
- * Same as spi_flash_cmd_read() except it also claims/releases the SPI
- * bus. Used as common part of the ->read() operation.
+ * Send the read status command to the device and wait for the wip
+ * (write-in-progress) bit to clear itself.
*/
-int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
- size_t cmd_len, void *data, size_t data_len);
+int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
+
/*
* Used for spi_flash write operation
* - SPI claim
@@ -117,10 +130,22 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
size_t cmd_len, const void *buf, size_t buf_len);
/*
- * Send the read status command to the device and wait for the wip
- * (write-in-progress) bit to clear itself.
+ * Flash write operation, support all possible write commands.
+ * Write the requested data out breaking it up into multiple write
+ * commands as needed per the write size.
*/
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
+int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
+ size_t len, const void *buf);
+
+/*
+ * Same as spi_flash_cmd_read() except it also claims/releases the SPI
+ * bus. Used as common part of the ->read() operation.
+ */
+int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
+ size_t cmd_len, void *data, size_t data_len);
+
+/* Flash read operation, support all possible read commands */
+int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
+ size_t len, void *data);
-/* Erase sectors. */
-int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len);
+#endif /* _SPI_FLASH_INTERNAL_H_ */
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 439490e..fecd5b8 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -195,7 +195,7 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
return ret;
}
-int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
+int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
{
u32 erase_size;
u8 cmd[4];
@@ -238,7 +238,7 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
return ret;
}
-int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
+int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
size_t len, const void *buf)
{
unsigned long byte_addr, page_size;
@@ -308,7 +308,7 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
return ret;
}
-int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
+int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
u8 cmd[5], bank_sel = 0;
diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c
index 995af14..61e9823 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -31,7 +31,7 @@ static const u32 spi_write_cmds_array[] = {
CMD_QUAD_PAGE_PROGRAM,
};
-/*
+/**
* struct spi_flash_params - SPI/QSPI flash device params structure
*
* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
@@ -164,7 +164,7 @@ static const struct spi_flash_params spi_flash_params_table[] = {
*/
};
-struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
+struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, u8 *idcode)
{
const struct spi_flash_params *params;
struct spi_flash *flash;
@@ -204,13 +204,13 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
flash->name = params->name;
/* Assign spi_flash ops */
- flash->write = spi_flash_cmd_write_multi;
+ flash->write = spi_flash_cmd_write_ops;
#ifdef CONFIG_SPI_FLASH_SST
if (params->flags & SST_WP)
flash->write = sst_write_wp;
#endif
- flash->erase = spi_flash_cmd_erase;
- flash->read = spi_flash_cmd_read_fast;
+ flash->erase = spi_flash_cmd_erase_ops;
+ flash->read = spi_flash_cmd_read_ops;
/* Compute the flash size */
flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256;
@@ -354,8 +354,8 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
print_buffer(0, idcode, 1, sizeof(idcode), 0);
#endif
- /* Validate ID's from flash dev table */
- flash = spi_flash_validate_ids(spi, idcode);
+ /* Validate params from spi_flash_params table */
+ flash = spi_flash_validate_params(spi, idcode);
if (!flash)
goto err_read_id;
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 4724eee..a46a0ab 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -1,7 +1,8 @@
/*
- * Interface to SPI flash
+ * Common SPI flash Interface
*
* Copyright (C) 2008 Atmel Corporation
+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -10,6 +11,7 @@
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*/
+
#ifndef _SPI_FLASH_H_
#define _SPI_FLASH_H_
@@ -17,34 +19,16 @@
#include <linux/types.h>
#include <linux/compiler.h>
-/* SPI flash CFI Manufacture ID's */
-#define SPI_FLASH_CFI_MFR_ATMEL 0x1f
-#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
-#define SPI_FLASH_CFI_MFR_SST 0xbf
-
-/* SECT flags */
-#define SECT_4K (1 << 0)
-#define SECT_32K (1 << 1)
-#define E_FSR (1 << 2)
-
-/* Write commands */
+/* Default read and write commands */
+#define CMD_READ_ARRAY_FAST 0x0b
#define CMD_PAGE_PROGRAM 0x02
-#define CMD_QUAD_PAGE_PROGRAM 0x32
enum spi_write_cmds {
PAGE_PROGRAM = 1 << 0,
QUAD_PAGE_PROGRAM = 1 << 1,
};
-
#define WR_CMD_FULL PAGE_PROGRAM | QUAD_PAGE_PROGRAM
-/* Read commands */
-#define CMD_READ_ARRAY_SLOW 0x03
-#define CMD_READ_ARRAY_FAST 0x0b
-#define CMD_READ_DUAL_OUTPUT_FAST 0x3b
-#define CMD_READ_DUAL_IO_FAST 0xbb
-#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
-
enum spi_read_cmds {
ARRAY_SLOW = 1 << 0,
ARRAY_FAST = 1 << 1,
@@ -52,17 +36,9 @@ enum spi_read_cmds {
DUAL_IO_FAST = 1 << 3,
QUAD_OUTPUT_FAST = 1 << 4,
};
-
#define RD_CMD_FULL ARRAY_SLOW | ARRAY_FAST | DUAL_OUTPUT_FAST | \
DUAL_IO_FAST | QUAD_OUTPUT_FAST
-/* SST specific macros */
-#ifdef CONFIG_SPI_FLASH_SST
-# define SST_WP 0x01 /* Supports AAI word program */
-# define CMD_SST_BP 0x02 /* Byte Program */
-# define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
-#endif
-
/**
* struct spi_flash - SPI flash structure
*
--
1.8.3
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