[U-Boot] [u-boot-release] [PATCH 3/3] board/c29xpcie: Add support of 8K page size NAND flash

[Liu Shengzhou-B36685]

> -----Original Message-----
> From: u-boot-release-bounces at linux.freescale.net [mailto:u-boot-release-
> bounces at linux.freescale.net] On Behalf Of Kushwaha Prabhakar-B32579
> Sent: Tuesday, September 24, 2013 4:17 PM
> To: u-boot at lists.denx.de
> Cc: Wood Scott-B07421; Kushwaha Prabhakar-B32579
> Subject: [u-boot-release] [PATCH 3/3] board/c29xpcie: Add support of 8K page
> size NAND flash
> 
> Defines constants required to support 8K page size NAND flash.
> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
> ---
>  Based upon git://git.denx.de/u-boot.git branch master
> 
>  include/configs/C29XPCIE.h |   10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index
> 83779ef..6a1e145 100644
> --- a/include/configs/C29XPCIE.h
> +++ b/include/configs/C29XPCIE.h
> @@ -189,13 +189,14 @@
>  				| CSPR_MSEL_NAND \
>  				| CSPR_V)
>  #define CONFIG_SYS_NAND_AMASK	IFC_AMASK(64*1024)
> +#define CONFIG_SYS_NAND_OOBSIZE	0x00000280	/* 640b */
>  #define CONFIG_SYS_NAND_CSOR	(CSOR_NAND_ECC_ENC_EN	/* ECC on encode */ \
>  				| CSOR_NAND_ECC_DEC_EN	/* ECC on decode */ \
>  				| CSOR_NAND_ECC_MODE_4	/* 4-bit ECC */ \
> -				| CSOR_NAND_RAL_2	/* RAL = 2 Bytes */ \
> -				| CSOR_NAND_PGS_2K	/* Page Size = 2k */ \
> -				| CSOR_NAND_SPRZ_64	/* Spare size = 64 */ \
> -				| CSOR_NAND_PB(64))	/* 64 Pages Per Block */
> +				| CSOR_NAND_RAL_3	/* RAL = 3 Bytes */ \
> +				| CSOR_NAND_PGS_8K	/* Page Size = 8K */ \
> +				| CSOR_NAND_SPRZ_CSOR_EXT /*oob in csor_ext*/\
> +				| CSOR_NAND_PB(128))	/*128 Pages Per Block*/
>  #define CONFIG_SYS_NAND_FTIM0	(FTIM0_NAND_TCCST(0x01) | \
>  				FTIM0_NAND_TWP(0x0c)   | \
>  				FTIM0_NAND_TWCHT(0x08) | \

Is it possible to do it with ONFI detection automatically instead of defining manually for different devices? such as what Linux driver does. 
-Shengzhou