[U-Boot] [PATCH 1/2] ARM: Add workaround for Cortex-A9 errata 794072

[Dirk Behme]

On 02.04.2014 05:33, nitin.garg at freescale.com wrote:
> From: Nitin Garg <nitin.garg at freescale.com>
>
> A short loop including a DMB instruction might cause a denial of
> service on another processor which executes a CP15 broadcast operation.
> Exists on r1, r2, r3, r4 revisions.
>
> Signed-off-by: Nitin Garg <nitin.garg at freescale.com>
> ---
>   README                     |    1 +
>   arch/arm/cpu/armv7/start.S |    5 +++++
>   2 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/README b/README
> index 7cb7c4f..a496c65 100644
> --- a/README
> +++ b/README
> @@ -566,6 +566,7 @@ The following options need to be configured:
>   		CONFIG_ARM_ERRATA_742230
>   		CONFIG_ARM_ERRATA_743622
>   		CONFIG_ARM_ERRATA_751472
> +		CONFIG_ARM_ERRATA_794072
>
>   		If set, the workarounds for these ARM errata are applied early
>   		during U-Boot startup. Note that these options force the
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index ac1e55a..b87a378 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -222,6 +222,11 @@ ENTRY(cpu_init_cp15)
>   	orr	r0, r0, #1 << 11	@ set bit #11
>   	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
>   #endif
> +#ifdef CONFIG_ARM_ERRATA_794072
> +	mrc	p15, 0, r0, c15, c0, 1	@ read diagnostic register
> +	orr	r0, r0, #1 << 4		@ set bit #4
> +	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
> +#endif

Where is the difference between the errata code for above new 
CONFIG_ARM_ERRATA_794072 and the existing

#ifdef CONFIG_ARM_ERRATA_742230
	mrc	p15, 0, r0, c15, c0, 1	@ read diagnostic register
	orr	r0, r0, #1 << 4		@ set bit #4
	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
#endif

?

Maybe we should just do a

#if (defined(CONFIG_ARM_ERRATA_794072) || defined(CONFIG_ARM_ERRATA_742230))

?

Best regards

Dirk