[U-Boot] [PATCH v3 1/3] ARM: Add workaround for Cortex-A9 errata 794072

Stefano Babic sbabic at denx.de
Wed Apr 2 17:26:13 CEST 2014


Hi Nitin,

On 02/04/2014 15:55, nitin.garg at freescale.com wrote:
> From: Nitin Garg <nitin.garg at freescale.com>
> 
> A short loop including a DMB instruction might cause a denial of
> service on another processor which executes a CP15 broadcast operation.
> Exists on r1, r2, r3, r4 revisions.
> 
> Signed-off-by: Nitin Garg <nitin.garg at freescale.com>
> Acked-by: Dirk Behme <dirk.behme at de.bosch.com>
> ---
>  README                     |    1 +
>  arch/arm/cpu/armv7/start.S |    2 +-
>  2 files changed, 2 insertions(+), 1 deletions(-)
> 
> diff --git a/README b/README
> index 7cb7c4f..a496c65 100644
> --- a/README
> +++ b/README
> @@ -566,6 +566,7 @@ The following options need to be configured:
>  		CONFIG_ARM_ERRATA_742230
>  		CONFIG_ARM_ERRATA_743622
>  		CONFIG_ARM_ERRATA_751472
> +		CONFIG_ARM_ERRATA_794072
>  
>  		If set, the workarounds for these ARM errata are applied early
>  		during U-Boot startup. Note that these options force the
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index ac1e55a..f3830c8 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -205,7 +205,7 @@ ENTRY(cpu_init_cp15)
>  	mcr	p15, 0, r0, c1, c0, 0	@ write system control register
>  #endif
>  
> -#ifdef CONFIG_ARM_ERRATA_742230
> +#if (defined(CONFIG_ARM_ERRATA_742230) || defined(CONFIG_ARM_ERRATA_794072))
>  	mrc	p15, 0, r0, c15, c0, 1	@ read diagnostic register
>  	orr	r0, r0, #1 << 4		@ set bit #4
>  	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
> 

Apart having an additional errata number, which is the contribute of
CONFIG_ARM_ERRATA_794072 ? We are already covered with
CONFIG_ARM_ERRATA_742230 and the work-around for dmb is already implemented.

Best regards,
Stefano Babic

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