[U-Boot] [PATCH v7] nand/denali: Adding Denali NAND driver support
Masahiro Yamada
yamada.m at jp.panasonic.com
Fri Apr 4 10:31:18 CEST 2014
Hi Chin, Scott,
On Fri, 28 Mar 2014 09:58:40 -0500
Chin Liang See <clsee at altera.com> wrote:
> Hi Masahiro,
>
> On Fri, 2014-03-28 at 18:21 +0900, Masahiro Yamada wrote:
> > Hi Chin,
> >
> >
> > > To add the Denali NAND driver support into U-Boot. It required
> > > information such as register base address from configuration
> > > header file within include/configs folder.
> > >
> > > Signed-off-by: Chin Liang See <clsee at altera.com>
> > > Cc: Artem Bityutskiy <artem.bityutskiy at linux.intel.com>
> > > Cc: David Woodhouse <David.Woodhouse at intel.com>
> > > Cc: Brian Norris <computersforpeace at gmail.com>
> > > Cc: Scott Wood <scottwood at freescale.com>
> > > Cc: Masahiro Yamada <yamada.m at jp.panasonic.com>
> > > ---
> > > Changes for v7
> > > - Adding Masahiro's code to support 64bit version controller
> > > - Removed unused stub functions
> > > - Enhanced the ECC calculation
> >
> >
> >
> > This version works on Panasonic SoCs and
> > looks good enough to be applied.
> > Thanks!
> >
>
> Great to hear that.
> It was a fun experience to work with you to get this patch work for both
> 32bit and 64 bit controller.
>
I am evaluating the performance of this driver.
Unfortunately it turned out this driver is very slow.
I have another driver for Denali NAND controller, which does not use
DMA.
So I compared the read/write performance.
This is my benchmark
(1) Write 0x10000000 bytes from SDRAM to NAND.
This patch (with DMA): 68 sec
My implementation without DMA: 46sec
(2) Read 0x10000000 bytes from NAND to SDRAM
This patch(with DMA): 45sec
My implementaion without DMA: 22sec
This patch with DMA is slower than without DMA.
What is worse is scanning bad block marks is extremely slow.
(Maybe abount 10x slower than without DMA)
So my question is, what should we do to improve the performance?
Is it a bad idea to use DMA?
The sequence of page_read in this patch is like this:
(1) Cache flush of DMA buffer area
(2) DMA transfer from NAND device to DMA buffer
(3) memcpy() from DMA buffer to destination memory
In Linux Kernel, I guess there is DMA sync process between (2) and (3).
But we don't have DMA API in U-Boot.
If we do not use DMA, the read sequence is like this
(1) Copy data directly from NAND register to destination memory
According to my benchmark, this is about twice faster.
Scott, do you have any advice?
Best Regards
Masahiro Yamada
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