[U-Boot] [U-Boot, 2/3] pcnet: align rx buffers for cache invalidation

Tom Rini trini at ti.com
Fri Apr 18 23:01:59 CEST 2014


On Mon, Apr 07, 2014 at 04:41:47PM +0100, Paul Burton wrote:

> The RX buffers are invalidated when a packet is received, however they
> were not suitably cache-line aligned. Allocate them seperately to the
> pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure
> suitable alignment for the cache invalidation, preventing anything else
> being placed in the same lines & lost.
> 
> Signed-off-by: Paul Burton <paul.burton at imgtec.com>

Applied to u-boot/master, thanks!

-- 
Tom
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