[U-Boot] am33xx : bit-flip correction in oob

Gupta, Pekon pekon at ti.com
Fri Apr 25 10:19:53 CEST 2014


Hi Marek,

>From: Belisko Marek [mailto:marek.belisko at gmail.com]
[...]
>With original patch (or with your) it fix only u-boot but it doesn't
>fix loading u-boot from SPL as it using custom nand_read_page (in
>am335x_spl_bch.c)
>and not from nand_bases there must be other update to fix this issue.
>Probably something like:
>--- a/drivers/mtd/nand/am335x_spl_bch.c
>+++ b/drivers/mtd/nand/am335x_spl_bch.c
>@@ -64,14 +64,16 @@ static int nand_command(int block, int page, uint32_t offs,
>        NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
>  hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
>  /* Row address */
>- hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
>- hwctrl(&mtd, ((page_addr >> 8) & 0xff),
>-       NAND_CTRL_ALE); /* A[27:20] */
>-#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
>- /* One more address cycle for devices > 128MiB */
>- hwctrl(&mtd, (page_addr >> 16) & 0x0f,
>-       NAND_CTRL_ALE); /* A[31:28] */
>-#endif
>+ if (cmd != NAND_CMD_RNDOUT) {
>+ hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
>+ hwctrl(&mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE); /* A[27:20] */
>+
>+ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
>+ /* One more address cycle for devices > 128MiB */
>+ hwctrl(&mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[31:28] */
>+ #endif
>+ }
>+
>  hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
>

Yes, SPL needs to be handled separately in both spl_simple.c and am335x_spl_bch.c.
Please submit a formal patch for this, so I can test it with multiple devices.

Thanks for fixing this..

with regards, pekon


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