[U-Boot] [PATCH] iomux-v3: Add support for mx6sl LVE bit

[Fabio Estevam]

On Mon, Apr 28, 2014 at 8:40 PM, Otavio Salvador
<otavio at ossystems.com.br> wrote:
>>  #define PAD_CTL_HYS            (1 << 16)
>> +#define PAD_CTL_LVE            (1 << 17)
>> +#define PAD_CTL_LVE_BIT                (1 << 22)
>
> This conflicts with:
>
> #define NO_PAD_CTRL (1 << 17)

Correct, I missed the NO_PAD_CTRL definition.

>
> I have changed the MASK as:
>
> -#define MUX_PAD_CTRL_MASK      ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT)
> +#define MUX_PAD_CTRL_MASK      ((iomux_v3_cfg_t)0x43ffff << MUX_PAD_CTRL_SHIFT)
>
> and seems to work fine. Do you see any issue?

Changing this mask will alter the layout of the bitfield definitions
and will affect the other fields:

 *
 * IOMUX/PAD Bit field definitions
 *
 * MUX_CTRL_OFS:        0..11 (12)
 * PAD_CTRL_OFS:       12..23 (12)
 * SEL_INPUT_OFS:       24..35 (12)
 * MUX_MODE + SION:       36..40  (5)
 * PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
 * SEL_INP:           59..62  (4)
 * reserved:             63    (1)
*/