[U-Boot] [PATCH v2 02/16] sunxi: dram: Remove broken super-standby remnants
Ian Campbell
ijc at hellion.org.uk
Tue Aug 5 08:37:48 CEST 2014
On Sun, 2014-08-03 at 05:32 +0300, Siarhei Siamashka wrote:
> If the dram->ppwrsctl (SDR_DPCR) register has the lowest bit set to 1,
> this means that DRAM is currently in self-refresh mode and retaining the
> old data. Since we have no idea what to do in this situation yet, just
> set this register to 0 and initialize DRAM in the same way as on any
> normal reboot (discarding whatever was stored there).
>
> This part of code was apparently used by the Allwinner boot0 bootloader
> to handle resume from the so-called super-standby mode. But this
> particular code got somehow mangled on the way from the boot0 bootloader
> to the u-boot-sunxi bootloader and has no chance of doing anything even
> remotely sane. For example:
> 1. in the original boot0 code we had "mctl_write_w(SDR_DPCR,
> 0x16510000)" (write to the register) and in the u-boot it now looks
> like "setbits_le32(&dram->ppwrsctl, 0x16510000)" (set bits in the
> register)
> 2. in the original boot0 code it was issuing three commands "0x12, 0x17,
> 0x13" (Self-Refresh entry, Self-Refresh exit, Refresh), but in the
> u-boot they have become "0x12, 0x12, 0x13" (Self-Refresh entry,
> Self-Refresh entry, Refresh)
>
> Signed-off-by: Siarhei Siamashka <siarhei.siamashka at gmail.com>
Acked-by: Ian Campbell <ijc at hellion.org.uk>
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