[U-Boot] [PATCH 4/4] sf: Enable byte program support
Bin Meng
bmeng.cn at gmail.com
Wed Dec 10 09:13:03 CET 2014
Hi Jagan,
On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
<jagannadh.teki at gmail.com> wrote:
> Enabled byte program support for sst flashes in sf.
>
> Few controllers will only support BP, so this patch
> gives a rx transfer flag to set the BP so-that sf
Actually it is a tx transfer flag.
> will operate on byte program transfer.
>
> Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki at gmail.com>
> ---
> drivers/mtd/spi/sf_internal.h | 5 ++++-
> drivers/mtd/spi/sf_params.c | 18 +++++++++---------
> drivers/mtd/spi/sf_probe.c | 8 ++++++--
> include/spi.h | 1 +
> 4 files changed, 20 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
> index fb53cb0..785f7a9 100644
> --- a/drivers/mtd/spi/sf_internal.h
> +++ b/drivers/mtd/spi/sf_internal.h
> @@ -40,10 +40,13 @@ enum {
> SECT_4K = 1 << 0,
> SECT_32K = 1 << 1,
> E_FSR = 1 << 2,
> - WR_QPP = 1 << 3,
> + SST_BP = 1 << 3,
> SST_WP = 1 << 4,
> + WR_QPP = 1 << 5,
> };
>
> +#define SST_WR (SST_BP | SST_WP)
> +
> #define SPI_FLASH_3B_ADDR_LEN 3
> #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
> #define SPI_FLASH_16MB_BOUN 0x1000000
> diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
> index 0f1f837..30875b3 100644
> --- a/drivers/mtd/spi/sf_params.c
> +++ b/drivers/mtd/spi/sf_params.c
> @@ -89,16 +89,16 @@ const struct spi_flash_params spi_flash_params_table[] = {
> {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
> #endif
> #ifdef CONFIG_SPI_FLASH_SST /* SST */
> - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WP},
> - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WP},
> - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WP},
> - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WP},
> + {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR},
> + {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR},
> + {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WR},
> + {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WR},
> {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
> - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WP},
> - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WP},
> - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WP},
> - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WP},
> - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WP},
> + {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WR},
> + {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WR},
> + {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WR},
> + {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR},
> + {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR},
> #endif
> #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
> {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, RD_NORM, 0},
> diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
> index 7cde4c0..ce9987f 100644
> --- a/drivers/mtd/spi/sf_probe.c
> +++ b/drivers/mtd/spi/sf_probe.c
> @@ -136,8 +136,12 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
> #ifndef CONFIG_DM_SPI_FLASH
> flash->write = spi_flash_cmd_write_ops;
> #if defined(CONFIG_SPI_FLASH_SST)
> - if (params->flags & SST_WP)
> - flash->write = sst_write_wp;
> + if (params->flags & SST_WR) {
> + if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
> + flash->write = sst_write_bp;
> + else
> + flash->write = sst_write_wp;
> + }
> #endif
> flash->erase = spi_flash_cmd_erase_ops;
> flash->read = spi_flash_cmd_read_ops;
> diff --git a/include/spi.h b/include/spi.h
> index 5b78271..ec17bd0 100644
> --- a/include/spi.h
> +++ b/include/spi.h
> @@ -34,6 +34,7 @@
>
> /* SPI TX operation modes */
> #define SPI_OPM_TX_QPP (1 << 0)
> +#define SPI_OPM_TX_BP (1 << 1)
>
> /* SPI RX operation modes */
> #define SPI_OPM_RX_AS (1 << 0)
> --
> 1.9.1
>
Tested-by: Bin Meng <bmeng.cn at gmail.com>
Regards,
Bin
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