[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

Chen-Yu Tsai wens at csie.org
Sat Dec 13 17:07:50 CET 2014


Hi,

On Sat, Dec 13, 2014 at 9:58 PM, Hans de Goede <hdegoede at redhat.com> wrote:
> Hi,
>
> On 09-12-14 13:31, Chen-Yu Tsai wrote:
>
> <snip>
>
>> Also I have a schematic file for A23 that someone provided me.
>> I don't remember who...
>>
>> It lists:
>>    - ALDO2 connected to VCC-DLL @ 2.5V
>>    - ALDO3 to VCC-PLL and AVCC (analog power) @ 3.0V
>>    - DCDC1 to all the normal stuff @ 3V
>>    - DCDC2 to VDD-SYS @ 1.1V
>>    - DCDC3 to VDD-CPU (main cpu) @ 1.1V (1.26V in my fex file)
>>    - DCDC5 to VCC-DRAM @ 1.1V (1.5V in my fex file)
>>    - DC5LDO to VDD-CPUS (special cpu)
>
>
> Thanks for this info!
>
> I've prepared a sun8i / A23 set for u-boot which I'll send upstream
> as soon as I've verified that it does not break A31 support.
>
> One thing which I've done is make u-boot explicitly disable power
> outputs which are unused, the specific target for this is DCDC4
> which is enabled by default at power on and not used on sun8i.
>
> As a side effect this also disabled ALDO1 which is enabled at power
> on too, and guess what, promptly my sdcard stopped working.
>
> So it seems that ALDO1 is hookedup to the sdcard on the Ippo
> tablets, for now I've also enabled ALDO1 in the defconfig for V5, it would
> be great if you could give my current sunxi-wip branch a try on your
> V5 tablet, and if it works remove the setting of ALDO1 from the V5
> defconfig and then try again. If it is like my V1.2 then it will
> stop booting when the SPL tries to load u-boot from the sdcard.

I missed that one. ALDO1 is connected to VCC-IO (pin controller I think),
VCC-PD (whatever that is, it isn't on the datasheet, but the schematic
implies it's part of the LCD block), VCC-USB (USB block in the SoC),
VCC-IO-WIFI (pull-ups and stuff for mmc wifi), and HPVCC (builtin
headphone amp).

Others I failed to mention:

ELDO2 to DVDD1V8-CSI @ 1.8V
GPIO0 to AVDD-CSI @ 2.8V
DC1SW to VCC-LCD @ 3V (this is just a switchable output of DCDC1)

Hope this helps.

ChenYu


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