[U-Boot] [PATCH 0/5] x86: Support PCI based UART as the U-Boot serial console

[Bin Meng]

Newer x86 Platform Controller Hub chipset (like Topcliff, BayTrail) starts
to integrate NS16550 compatible PCI UART devices. In order to use them, we
have to scan the PCI bus and allocate memory/io address in the early phase.

On Intel Crown Bay board, there are 4 UART DB9 connectors, one of which is
from the superio legacy serial port while the other 3 are connected to the
Topcliff PCH UART devices.

The board configuration file needs to supply the PCI UART vendor ID and
device ID via CONFIG_PCI_UART_DEV if we want to use the PCI UART as the
U-Boot serial console.


Bin Meng (5):
  x86: Add missing DECLARE_GLOBAL_DATA_PTR for pci.c
  x86: Support pci bus scan in the early phase
  x86: Add an API for finding pci devices in the early phase
  x86: Support PCI UART in the x86_serial driver
  x86: Add PCI UART related defines in crownbay.h

 arch/x86/cpu/pci.c          | 44 ++++++++++++++++++++++++++++++++++++++++++++
 arch/x86/include/asm/pci.h  |  2 ++
 drivers/serial/serial_x86.c | 30 ++++++++++++++++++++++++++++++
 include/configs/crownbay.h  |  5 +++++
 4 files changed, 81 insertions(+)

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1.8.2.1