[U-Boot] [PATCH v2 3/6] PPC 85xx: Add qemu-ppce500 machine
Scott Wood
scottwood at freescale.com
Tue Feb 4 00:24:32 CET 2014
On Fri, 2014-01-31 at 10:05 -0800, York Sun wrote:
> On 01/31/2014 03:16 AM, Alexander Graf wrote:
> > +/*
> > + * DDR Setup
> > + */
> > +#define CONFIG_VERY_BIG_RAM
> > +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
> > +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
> > +
> > +#define CONFIG_CHIP_SELECTS_PER_CTRL 0
>
> I don't know if the qemu has PCI, DDR, etc. Setting the above line to 0 will
> actually disable DDR controllers. Is that what you want?
QEMU does not emulate the DDR controller.
> > +
> > +/* Get RAM size from device tree */
> > +#define CONFIG_DDR_SPD
>
> You enabled SPD but I don't see the I2C address. Did you miss something, or you
> don't really use SPD?
This should be removed.
-Scott
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