[U-Boot] [PATCH 2/2] usb: ehci: fully align interrupt QHs/QTDs
Stephen Warren
swarren at wwwdotorg.org
Fri Feb 7 17:24:27 CET 2014
On 02/07/2014 06:48 AM, Marek Vasut wrote:
> On Friday, February 07, 2014 at 07:48:06 AM, Stephen Warren wrote:
>> On 02/06/2014 07:53 PM, Marek Vasut wrote:
>>> On Thursday, February 06, 2014 at 09:13:06 PM, Stephen Warren wrote:
>>>> From: Stephen Warren <swarren at nvidia.com>
>>>>
>>>> These data structures are passed to cache-flushing routines, and hence
>>>> must be conform to both the USB the cache-flusing alignment
>>>> requirements. That means aligning to USB_DMA_MINALIGN. This is
>>>> important on systems where cache lines are >32 bytes.
>>>>
>>>> Signed-off-by: Stephen Warren <swarren at nvidia.com>
>>>
>>> Acked-by: Marek Vasut <marex at denx.de>
>>
>> Oh, I assumed you would be applying this?
>
> Yes I would , but the previous patch still needs some discussion.
Oh OK. The patches don't depend on each-other in any way, so you can go
ahead and apply this now if you want. I should have actually sent them
separately rather than as a series.
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