[U-Boot] [PATCH] ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control

[Tom Rini]

From: Dave Gerlach <d-gerlach at ti.com>

Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.

Signed-off-by: Dave Gerlach <d-gerlach at ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini at ti.com>
---
 arch/arm/cpu/armv7/am33xx/board.c        |    6 +++++-
 arch/arm/cpu/armv7/am33xx/clock_am43xx.c |    2 ++
 arch/arm/include/asm/arch-am33xx/cpu.h   |    6 +++++-
 arch/arm/include/asm/arch-am33xx/gpio.h  |    4 ++--
 board/ti/am43xx/board.c                  |   16 ++++++++--------
 board/ti/am43xx/mux.c                    |    6 +++---
 6 files changed, 25 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index c7dad66..2b15a64 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -36,11 +36,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static const struct gpio_bank gpio_bank_am33xx[4] = {
+static const struct gpio_bank gpio_bank_am33xx[] = {
 	{ (void *)AM33XX_GPIO0_BASE, METHOD_GPIO_24XX },
 	{ (void *)AM33XX_GPIO1_BASE, METHOD_GPIO_24XX },
 	{ (void *)AM33XX_GPIO2_BASE, METHOD_GPIO_24XX },
 	{ (void *)AM33XX_GPIO3_BASE, METHOD_GPIO_24XX },
+#ifdef CONFIG_AM43XX
+	{ (void *)AM33XX_GPIO4_BASE, METHOD_GPIO_24XX },
+	{ (void *)AM33XX_GPIO5_BASE, METHOD_GPIO_24XX },
+#endif
 };
 
 const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
index 97c00b4..440cf8b 100644
--- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
@@ -94,6 +94,8 @@ void enable_basic_clocks(void)
 		&cmper->gpio1clkctrl,
 		&cmper->gpio2clkctrl,
 		&cmper->gpio3clkctrl,
+		&cmper->gpio4clkctrl,
+		&cmper->gpio5clkctrl,
 		&cmper->i2c1clkctrl,
 		&cmper->emiffwclkctrl,
 		&cmper->emifclkctrl,
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 9febfa2..f0880d7 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -351,7 +351,11 @@ struct cm_perpll {
 	unsigned int gpio2clkctrl;	/* offset 0x480 */
 	unsigned int resv20;
 	unsigned int gpio3clkctrl;	/* offset 0x488 */
-	unsigned int resv21[7];
+	unsigned int resv41;
+	unsigned int gpio4clkctrl;	/* offset 0x490 */
+	unsigned int resv42;
+	unsigned int gpio5clkctrl;	/* offset 0x498 */
+	unsigned int resv21[3];
 
 	unsigned int i2c1clkctrl;	/* offset 0x4A8 */
 	unsigned int resv22;
diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h b/arch/arm/include/asm/arch-am33xx/gpio.h
index a1ffd49..220603d 100644
--- a/arch/arm/include/asm/arch-am33xx/gpio.h
+++ b/arch/arm/include/asm/arch-am33xx/gpio.h
@@ -12,8 +12,8 @@
 #define AM33XX_GPIO1_BASE       0x4804C000
 #define AM33XX_GPIO2_BASE       0x481AC000
 #define AM33XX_GPIO3_BASE       0x481AE000
-
-#define GPIO_22			22
+#define AM33XX_GPIO4_BASE	0x48320000
+#define AM33XX_GPIO5_BASE	0x48322000
 
 /* GPIO CTRL register */
 #define GPIO_CTRL_DISABLEMODULE_SHIFT	0
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index ed87cd9..63364b1 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -346,14 +346,14 @@ static void enable_vtt_regulator(void)
 	u32 temp;
 
 	/* enable module */
-	writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO0_BASE + OMAP_GPIO_CTRL);
-
-	/* enable output for GPIO0_22 */
-	writel(GPIO_SETDATAOUT(GPIO_22),
-	       AM33XX_GPIO0_BASE + OMAP_GPIO_SETDATAOUT);
-	temp = readl(AM33XX_GPIO0_BASE + OMAP_GPIO_OE);
-	temp = temp & ~(GPIO_OE_ENABLE(GPIO_22));
-	writel(temp, AM33XX_GPIO0_BASE + OMAP_GPIO_OE);
+	writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO5_BASE + OMAP_GPIO_CTRL);
+
+	/* enable output for GPIO5_7 */
+	writel(GPIO_SETDATAOUT(7),
+	       AM33XX_GPIO5_BASE + OMAP_GPIO_SETDATAOUT);
+	temp = readl(AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
+	temp = temp & ~(GPIO_OE_ENABLE(7));
+	writel(temp, AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
 }
 
 void sdram_init(void)
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index 810b194..51f7fd6 100644
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -33,8 +33,8 @@ static struct module_pin_mux i2c0_pin_mux[] = {
 	{-1},
 };
 
-static struct module_pin_mux gpio0_22_pin_mux[] = {
-	{OFFSET(ddr_ba2), (MODE(9) | PULLUP_EN)},	/* GPIO0_22 */
+static struct module_pin_mux gpio5_7_pin_mux[] = {
+	{OFFSET(spi0_cs0), (MODE(7) | PULLUP_EN)},	/* GPIO5_7 */
 	{-1},
 };
 
@@ -49,7 +49,7 @@ void enable_board_pin_mux(void)
 	configure_module_pin_mux(i2c0_pin_mux);
 
 	if (board_is_gpevm())
-		configure_module_pin_mux(gpio0_22_pin_mux);
+		configure_module_pin_mux(gpio5_7_pin_mux);
 }
 
 void enable_i2c0_pin_mux(void)
-- 
1.7.9.5