[U-Boot] Chain loading an u-boot from an u-boot
Stefano Babic
sbabic at denx.de
Tue Feb 11 10:38:02 CET 2014
Hi Helmut,
On 10/02/2014 12:11, Helmut Raiger wrote:
>
> So the idea was:
>
> - use a small u-boot (<128kB) in the first PEB of the NAND (written with
> 1bit HW-ECC) that supports 4bit BCH
> - let it load a second u-boot (<512kB) from the next 4 PEBs (written
> with 4bit BCH)
> - jump to the second u-boot and load the kernel from an UBI volume using
> 1bit HW-ECC again
I understand the first two points, but why do you store the kernel again
with 1bit HW-ECC ? The second U-Boot is able to check with 4bit BCH and
your NAND requires 4bit.
>
> I did all that and it seemed to work just fine, but jumping to the
> second u-boot almost always
> crashes the system. In detail we do:
>
> - romboot loads the SPL (2kb)
> - SPL loads the first u-boot stage (which relocates and runs nicely)
> - the first u-boot 'boots' the second u-boot by loading it from the NAND
> - the second u-boot is loaded to the link address minus 2kB (for SPL)
> - this is the same for the first and the second u-boot (link address
> 0x87e00000 - 0x800 = 0x87dff800)
> - it jumps to 0x87e00000 omitting the SPL for the second u-boot
> - the second u-boot should relocated itself again
>
> The second u-boot is verified in RAM with crc32 and it is valid.
>
> I've tested many configuration and found, that it only works if both
> u-boots are identical:
>
> - different builds of the same code work (different build date, but same
> code)
I agree with Andreas' analyses. It seems that the second u-boot
overwrites your running U-Boot and only if they are identical you have
no problem, that means that you are not changing the running code.
Regards,
Stefano Babic
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