[U-Boot] [PATCH 1/6] Add MS7206SE support.
Nobuhiro Iwamatsu
iwamatsu at nigauri.org
Wed Feb 12 07:50:12 CET 2014
Hi, Sato-san.
2014-02-11 21:24 GMT+09:00 Yoshinori Sato <ysato at users.sourceforge.jp>:
> Hi.
> This patch series add to Renesas MS7206SE board support.
> And SH2A targets various update.
> Please comment.
Please use cover-letter option of git format-patch.
>
> Signed-off-by: Yoshinori Sato <ysato at users.sourceforge.jp>
> ---
> board/renesas/ms7206se/Makefile | 10 +++
> board/renesas/ms7206se/lowlevel_init.S | 124 +++++++++++++++++++++++++++++++++
> board/renesas/ms7206se/ms7206se.c | 43 ++++++++++++
> boards.cfg | 1 +
> drivers/net/smc91111.h | 31 ++++++++-
Please divide a patch by device support and board support.
And please send patch of ether part to net maintainer.
Best regards,
Nobuhiro
> include/configs/ms7206se.h | 95 +++++++++++++++++++++++++
> 6 files changed, 303 insertions(+), 1 deletion(-)
> create mode 100644 board/renesas/ms7206se/Makefile
> create mode 100644 board/renesas/ms7206se/lowlevel_init.S
> create mode 100644 board/renesas/ms7206se/ms7206se.c
> create mode 100644 include/configs/ms7206se.h
>
> diff --git a/board/renesas/ms7206se/Makefile b/board/renesas/ms7206se/Makefile
> new file mode 100644
> index 0000000..eed3769
> --- /dev/null
> +++ b/board/renesas/ms7206se/Makefile
> @@ -0,0 +1,10 @@
> +#
> +# Copyright (C) 2013 Yoshinori Sato <ysato at users.sourceforge.jp>
> +#
> +# u-boot/board/renesas/ms7619se/Makefile
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y := ms7206se.o
> +obj-y += lowlevel_init.o
> diff --git a/board/renesas/ms7206se/lowlevel_init.S b/board/renesas/ms7206se/lowlevel_init.S
> new file mode 100644
> index 0000000..4e1e70c
> --- /dev/null
> +++ b/board/renesas/ms7206se/lowlevel_init.S
> @@ -0,0 +1,124 @@
> +/*
> + * Copyright (C) 2013 Yoshinori Sato <ysato at users.sourceforge.jp>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <config.h>
> +#include <version.h>
> +
> +#include <asm/processor.h>
> +#include <asm/macro.h>
> +#define INTMSK0 0x11800000
> +
> + .global lowlevel_init
> +
> + .text
> + .align 2
> +
> +lowlevel_init:
> + mova CPG_settings_table,r0
> +1: mov.l @r0+,r3 // Address (or zero)
> + tst r3,r3
> + bt 2f
> + mov.l @r0+,r1 // data
> + bra 1b
> + mov.w r1, at r3
> +2:
> + mov.l $mclkcr,r0 // MCLKCR setting
> + mov #0x40,r1
> + mov.b r1, at r0
> +
> + // Set up the Bus Controler
> + mova BSC_settings_table,r0
> +5: mov.l @r0+,r3 // Address (or zero)
> + tst r3,r3
> + bt 6f
> + mov.l @r0+,r1 // data
> + bra 5b
> + mov.l r1, at r3
> +
> +6:
> + mov.l $delay_count,r0
> +7:
> + dt r0
> + bf 7b
> +
> + mov.l $SDMR,r1 // Turns on SDRAM controller
> + mov.l $SDMR_val,r2
> + mov.l r2, at r1
> +
> + // Set up the Pin Function Controler
> + mova PFC_settings_table,r0
> +3: mov.l @r0+,r3 // Address (or zero)
> + tst r3,r3
> + bt 4f
> + mov.l @r0+,r1 // data
> + bra 3b
> + mov.w r1, at r3
> +4:
> + rts/n
> +
> + .align 4
> +$delay_count:
> + .long 2000
> +$SDMR: .long 0xfffc5880
> +$SDMR_val:
> + .long 0
> +
> +$mclkcr:
> + .long MCLKCR
> +
> +CPG_settings_table:
> + .long WTCSR,0xA500
> + .long WTCNT,0x5A00
> + .long WTCSR,0xA51E
> + .long FRQCR, 0x120c /* input:33.3333MHz I:B:P=6:2:1=200MHz:66MHz:33MHz */
> + .long 0
> +
> +BSC_settings_table:
> + # Settings from Hitachi docs for SE7206
> + .long CMNCR, 0x00001010
> + .long CS0BCR, 0x10000600
> + .long CS2BCR, 0x10000600
> + .long CS4BCR, 0x10000400
> + .long CS5BCR, 0x10000400
> + .long CS3BCR, 0x10004600
> + .long CS0WCR, 0x00000380; /* wait:4cycle */
> + .long CS2WCR, 0x00000380;
> + .long CS4WCR, 0x00000380;
> + .long CS5WCR, 0x00000380;
> + .long CS3WCR, 0x00004892; /* pre->actv:1cycle, actv->read/write:2cycle, write->pre:1cycle, ref->actv:4cycle */
> + .long SDCR, 0x00000811;
> + .long RTCNT, 0xa55a0083;
> + .long RTCOR, 0xa55a0083;
> + .long RTCSR, 0xa55a0008; /* reflesh count=B耳/4 */
> + .long 0
> +
> +PFC_settings_table:
> + .long PACRH3, 0x0022
> + .long PACRH2, 0x1111
> + .long PACRH1, 0x1115
> + .long PACRL4, 0x1111
> + .long PACRL3, 0x1125
> + .long PACRL2, 0x2255
> + .long PACRL1, 0x5500
> + .long PBCR3, 0x0022
> + .long PBCR2, 0x2244
> + .long PBCR1, 0x1111
> + .long PCCRL1, 0x1111
> + .long PDCRH4, 0x1111
> + .long PDCRH3, 0x1111
> + .long PDCRH2, 0x1111
> + .long PDCRH1, 0x1111
> + .long PDCRL4, 0x1111
> + .long PDCRL3, 0x1111
> + .long PECRH1, 0x0005
> + .long PECRL4, 0x3223
> + .long PECRL3, 0x3030
> + .long PECRL2, 0x3550
> + .long IFCR, 0x0003
> + .long 0
> +
> +$INTMSK0:
> + .long INTMSK0
> diff --git a/board/renesas/ms7206se/ms7206se.c b/board/renesas/ms7206se/ms7206se.c
> new file mode 100644
> index 0000000..45906fb
> --- /dev/null
> +++ b/board/renesas/ms7206se/ms7206se.c
> @@ -0,0 +1,43 @@
> +/*
> + * Copyright (C) 2013 Yoshinori Sato <ysato at users.sourceforge.jp>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <net.h>
> +#include <netdev.h>
> +#include <asm/io.h>
> +#include <asm/processor.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int checkboard(void)
> +{
> + puts("BOARD: Renesas Technology MS7206SE\n");
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
> + gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
> + printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
> + return 0;
> +}
> +
> +#ifdef CONFIG_CMD_NET
> +int board_eth_init(bd_t *bis)
> +{
> + int rc = 0;
> +#ifdef CONFIG_SMC91111
> + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
> +#endif
> + return rc;
> +}
> +#endif
> diff --git a/boards.cfg b/boards.cfg
> index c97c4bd..a56f196 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -1203,6 +1203,7 @@ Active powerpc ppc4xx - xilinx ppc440-generic
> Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda <ricardo.ribalda at uam.es>
> Active sandbox sandbox - sandbox sandbox sandbox - Simon Glass <sjg at chromium.org>
> Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu <iwamatsu.nobuhiro at renesas.com>:Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
> +Active sh sh2 - renesas ms7206se ms7206se - Yoshinori Sato <ysato at users.sourceforge.jp>
> Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy <phil.edworthy at renesas.com>
> Active sh sh2 - renesas rsk7269 rsk7269 - -
> Active sh sh3 - - mpr2 mpr2 - Mark Jonas <mark.jonas at de.bosch.com>
> diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h
> index 9deee9b..513a67d 100644
> --- a/drivers/net/smc91111.h
> +++ b/drivers/net/smc91111.h
> @@ -236,7 +236,36 @@ struct smc91111_priv{
> *(__b2 + __i) = SMC_inb((a),(r)); \
> }; \
> }while(0)
> -
> +#elif defined(CONFIG_MS7206SE)
> +#define SWAB(x) ({ word __x = x; ((__x << 8)|(__x >> 8));})
> +#define SMC_inw(a,r) *((volatile word *)((a)->iobase + (r)))
> +#define SMC_inb(a,r) (*((volatile byte *)((a)->iobase + ((r) ^ 0x01))))
> +#define SMC_insw(a,r,b,l) \
> + do { \
> + int __i; \
> + word *__b2 = (word *)(b); \
> + for (__i = 0; __i < (l); __i++) { \
> + *__b2++ = SWAB(SMC_inw(a, r)); \
> + } \
> + } while(0);
> +#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
> +#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
> + word __w = SMC_inw((a),((r)&(~1))); \
> + if(((r) & 1)) \
> + __w = (__w & 0x00ff) | (__d << 8); \
> + else \
> + __w = (__w & 0xff00) | (__d); \
> + SMC_outw((a),__w,((r)&(~1))); \
> + })
> +#define SMC_outsw(a,r,b,l) \
> + do { \
> + int __i; \
> + word *__b2 = (word *)(b); \
> + for (__i = 0; __i < (l); __i++) { \
> + SMC_outw(a, SWAB(*__b2), r); \
> + __b2++; \
> + } \
> + } while(0);
> #else /* if not CONFIG_CPU_PXA25X and not CONFIG_LEON */
>
> #ifndef CONFIG_SMC_USE_IOFUNCS /* these macros don't work on some boards */
> diff --git a/include/configs/ms7206se.h b/include/configs/ms7206se.h
> new file mode 100644
> index 0000000..805044c
> --- /dev/null
> +++ b/include/configs/ms7206se.h
> @@ -0,0 +1,95 @@
> +/*
> + * Configuation settings for the Renesas Technology MS7206SE
> + *
> + * Copyright (C) 2013 Yoshinori Sato <ysato at users.sourceforge.jp>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __MS7206SE_H
> +#define __MS7206SE
> +
> +#undef DEBUG
> +#define CONFIG_SH 1
> +#define CONFIG_SH2 1
> +#define CONFIG_SH2A 1
> +#define CONFIG_CPU_SH7206 1
> +#define CONFIG_MS7206SE 1
> +
> +#define CONFIG_CMD_FLASH
> +#define CONFIG_CMD_NET
> +#define CONFIG_CMD_SAVEENV
> +#define CONFIG_CMD_SDRAM
> +#define CONFIG_CMD_MEMORY
> +#define CONFIG_CMD_MEMTEST
> +#define CONFIG_CMD_CACHE
> +
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_BOOTARGS "console=ttySC3,115200"
> +#define CONFIG_LOADADDR 0x0C100000 /* MS7206SE01_SDRAM_BASE + 1MB */
> +
> +#define CONFIG_VERSION_VARIABLE
> +#undef CONFIG_SHOW_BOOT_PROGRESS
> +
> +/* MEMORY */
> +#define MS7206SE_SDRAM_BASE 0x0C000000
> +#define MS7206SE_FLASH_BASE_1 0x20000000 /* Non cache */
> +#define MS7206SE_FLASH_BANK_SIZE (16 * 1024 * 1024)
> +
> +#define CONFIG_SYS_TEXT_BASE 0x0C7C0000
> +#define CONFIG_SYS_LONGHELP /* undef to save memory */
> +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
> +#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
> +#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
> +#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
> +/* Buffer size for Boot Arguments passed to kernel */
> +#define CONFIG_SYS_BARGSIZE 512
> +/* List of legal baudrate settings for this board */
> +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 3840, 57600, 115200 }
> +
> +/* SCIF */
> +#define CONFIG_SCIF_CONSOLE 1
> +#define CONFIG_CONS_SCIF3 1
> +
> +#define CONFIG_SYS_MEMTEST_START CONFIG_LOADADDR
> +#define CONFIG_SYS_MEMTEST_END (CONFIG_LOADADDR + (63 * 1024 * 1024))
> +
> +#define CONFIG_SYS_SDRAM_BASE MS7206SE_SDRAM_BASE
> +#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
> +
> +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024)
> +#define CONFIG_SYS_MONITOR_BASE MS7206SE_FLASH_BASE_1
> +#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
> +#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
> +#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
> +
> +/* FLASH */
> +#define CONFIG_FLASH_CFI_DRIVER
> +#define CONFIG_SYS_FLASH_CFI
> +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
> +#undef CONFIG_SYS_FLASH_QUIET_TEST
> +#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
> +#define CONFIG_SYS_FLASH_BASE MS7206SE_FLASH_BASE_1
> +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
> +#define CONFIG_SYS_MAX_FLASH_SECT 142
> +#define CONFIG_SYS_MAX_FLASH_BANKS 1
> +
> +#define CONFIG_ENV_IS_IN_FLASH
> +#define CONFIG_ENV_SECT_SIZE (128 * 1024)
> +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
> +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
> +#define CONFIG_SYS_FLASH_ERASE_TOUT 12000
> +#define CONFIG_SYS_FLASH_WRITE_TOUT 500
> +
> +/* Board Clock */
> +#define CONFIG_SYS_CLK_FREQ 33333333
> +#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
> +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
> +#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
> +#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
> +
> +/* Network interface */
> +#define CONFIG_SMC91111
> +#define CONFIG_SMC91111_BASE (0x30000000)
> +
> +#endif /* __MS7206SE_H */
> --
> 1.8.5.3
>
>
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--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
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