[U-Boot] [PATCH imx6dl] Enable SION Bit for GPIO16 when ALT2 mode is selected

Stefano Babic sbabic at denx.de
Wed Feb 12 14:23:16 CET 2014


Hi Andy,

On 12/02/2014 13:57, Andy Ng wrote:
> From 45da8256deadb5c5cf38311ed5470e4ba5b20570 Mon Sep 17 00:00:00 2001
> From: Andy Ng <andreas2025 at gmail.com>
> Date: Wed, 12 Feb 2014 12:40:47 +0000
> Subject: [PATCH] SION bit has to be on for the pins that are used as
> ENET_REF_CLK
> 
> Signed-off-by: Andy Ng <andreas2025 at gmail.com>
> ---

You use git, just let git make the job for you. Use git format-patch to
create the patch and git send-email to send it to the ML.

Regards,
Stefano Babic

>  arch/arm/include/asm/arch-mx6/mx6dl_pins.h |    6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
> b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
> index 55cc9ad..2e414ad 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
> @@ -647,7 +647,7 @@ MX6_PAD_DECL(ENET_MDIO__ESAI_RX_CLK,    0x05BC,
> 0x01EC, 2, 0x083C, 0, 0)
>  MX6_PAD_DECL(ENET_MDIO__ENET_1588_EVENT1_OUT,    0x05BC, 0x01EC, 4,
> 0x0000, 0, 0)
>  MX6_PAD_DECL(ENET_MDIO__GPIO1_IO22,    0x05BC, 0x01EC, 5, 0x0000, 0, 0)
>  MX6_PAD_DECL(ENET_MDIO__SPDIF_LOCK,    0x05BC, 0x01EC, 6, 0x0000, 0, 0)
> -MX6_PAD_DECL(ENET_REF_CLK__ENET_TX_CLK,    0x05C0, 0x01F0, 1, 0x0000, 0, 0)
> +MX6_PAD_DECL(ENET_REF_CLK__ENET_TX_CLK,    0x05C0, 0x01F0, 1 |
> IOMUX_CONFIG_SION, 0x0000, 0, 0)
>  MX6_PAD_DECL(ENET_REF_CLK__ESAI_RX_FS,    0x05C0, 0x01F0, 2, 0x082C, 0, 0)
>  MX6_PAD_DECL(ENET_REF_CLK__GPIO1_IO23,    0x05C0, 0x01F0, 5, 0x0000, 0, 0)
>  MX6_PAD_DECL(ENET_REF_CLK__SPDIF_SR_CLK,    0x05C0, 0x01F0, 6, 0x0000, 0, 0)
> @@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,
> 0x0210, 5, 0x0000, 0, 0)
>  MX6_PAD_DECL(GPIO_1__SD1_CD_B,    0x05E0, 0x0210, 6, 0x0000, 0, 0)
>  MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2,    0x05E4, 0x0214, 0, 0x0850, 1, 0)
>  MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN,    0x05E4, 0x0214, 1, 0x0000, 0, 0)
> -MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2, 0x080C, 0, 0)
> +MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2 |
> IOMUX_CONFIG_SION, 0x080C, 0, 0)
>  MX6_PAD_DECL(GPIO_16__SD1_LCTL,    0x05E4, 0x0214, 3, 0x0000, 0, 0)
>  MX6_PAD_DECL(GPIO_16__SPDIF_IN,    0x05E4, 0x0214, 4, 0x08F0, 2, 0)
>  MX6_PAD_DECL(GPIO_16__GPIO7_IO11,    0x05E4, 0x0214, 5, 0x0000, 0, 0)
> @@ -934,7 +934,7 @@ MX6_PAD_DECL(RGMII_TX_CTL__USBOH3_H2_STROBE,
> 0x06BC, 0x02D4, 0 | IOMUX_CONFIG_SI
>  MX6_PAD_DECL(RGMII_TX_CTL__USB_H2_STROBE,    0x06BC, 0x02D4, 0 |
> IOMUX_CONFIG_SION, 0x0000, 0, PAD_CTL_PUS_47K_UP)
>  MX6_PAD_DECL(RGMII_TX_CTL__RGMII_TX_CTL,    0x06BC, 0x02D4, 1, 0x0000, 0, 0)
>  MX6_PAD_DECL(RGMII_TX_CTL__GPIO6_IO26,    0x06BC, 0x02D4, 5, 0x0000, 0, 0)
> -MX6_PAD_DECL(RGMII_TX_CTL__ENET_REF_CLK,    0x06BC, 0x02D4, 7, 0x080C, 1, 0)
> +MX6_PAD_DECL(RGMII_TX_CTL__ENET_REF_CLK,    0x06BC, 0x02D4, 7 |
> IOMUX_CONFIG_SION, 0x080C, 1, 0)
>  MX6_PAD_DECL(RGMII_TXC__USB_H2_DATA,    0x06C0, 0x02D8, 0 |
> IOMUX_CONFIG_SION, 0x0000, 0, 0)
>  MX6_PAD_DECL(RGMII_TXC__RGMII_TXC,    0x06C0, 0x02D8, 1, 0x0000, 0, 0)
>  MX6_PAD_DECL(RGMII_TXC__SPDIF_EXT_CLK,    0x06C0, 0x02D8, 2, 0x08F4, 1, 0)
> 


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