[U-Boot] [PATCH][RFC] add pci bridge 64 bit prefechable mem support

[fenghua at phytium.com.cn]

From: David Feng <fenghua at phytium.com.cn>

u-boot did not program the upper 32 bits of prefetchable base and limit
in pci bridge config space. I think it's needed when 64 bit address space
is used.

Signed-off-by: David Feng <fenghua at phytium.com.cn>
---
 drivers/pci/pci_auto.c |   10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 86ba6b5..896605a 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -226,6 +226,10 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
 		/* Set up memory and I/O filter limits, assume 32-bit I/O space */
 		pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
 					(pci_prefetch->bus_lower & 0xfff00000) >> 16);
+#ifdef CONFIG_SYS_PCI_64BIT
+		pci_hose_write_config_dword(hose, dev, PCI_PREF_BASE_UPPER32,
+					pci_prefetch->bus_lower >> 32);
+#endif
 
 		cmdstat |= PCI_COMMAND_MEMORY;
 	} else {
@@ -275,7 +279,11 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
 		pciauto_region_align(pci_prefetch, 0x100000);
 
 		pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
-				(pci_prefetch->bus_lower - 1) >> 16);
+					(pci_prefetch->bus_lower - 1) >> 16);
+#ifdef CONFIG_SYS_PCI_64BIT
+		pci_hose_write_config_dword(hose, dev, PCI_PREF_LIMIT_UPPER32,
+					(pci_prefetch->bus_lower - 1) >> 32);
+#endif
 	}
 
 	if (pci_io) {
-- 
1.7.9.5