[U-Boot] [PATCH v2 5/6] Module enabler cleanup
Yoshinori Sato
ysato at users.sourceforge.jp
Thu Feb 13 15:13:44 CET 2014
Signed-off-by: Yoshinori Sato <ysato at users.sourceforge.jp>
---
arch/sh/cpu/sh2/cpu.c | 27 ++++++++++++---------------
arch/sh/include/asm/cpu_sh2.h | 3 +++
arch/sh/include/asm/cpu_sh2a.h | 16 ++++++++++++++++
3 files changed, 31 insertions(+), 15 deletions(-)
create mode 100644 arch/sh/include/asm/cpu_sh2a.h
diff --git a/arch/sh/cpu/sh2/cpu.c b/arch/sh/cpu/sh2/cpu.c
index b401d08..0a6a58b 100644
--- a/arch/sh/cpu/sh2/cpu.c
+++ b/arch/sh/cpu/sh2/cpu.c
@@ -10,16 +10,17 @@
#include <asm/processor.h>
#include <asm/io.h>
-#define STBCR4 0xFFFE040C
-#define cmt_clock_enable() do {\
- writeb(readb(STBCR4) & ~0x04, STBCR4);\
- } while (0)
-#define scif0_enable() do {\
- writeb(readb(STBCR4) & ~0x80, STBCR4);\
- } while (0)
-#define scif3_enable() do {\
- writeb(readb(STBCR4) & ~0x10, STBCR4);\
- } while (0)
+#if defined(CONFIG_CONS_SCIF0)
+# define CH 0
+#elif defined(CONFIG_CONS_SCIF1)
+# define CH 1
+#elif defined(CONFIG_CONS_SCIF2)
+# define CH 2
+#elif defined(CONFIG_CONS_SCIF3)
+# define CH 3
+#else
+# error "Default SCIF doesn't set....."
+#endif
int checkcpu(void)
{
@@ -30,11 +31,7 @@ int checkcpu(void)
int cpu_init(void)
{
/* SCIF enable */
-#if defined(CONFIG_CONS_SCIF3)
- scif3_enable();
-#else
- scif0_enable();
-#endif
+ scif_enable(CH);
/* CMT clock enable */
cmt_clock_enable() ;
return 0;
diff --git a/arch/sh/include/asm/cpu_sh2.h b/arch/sh/include/asm/cpu_sh2.h
index b84dad4..deadece 100644
--- a/arch/sh/include/asm/cpu_sh2.h
+++ b/arch/sh/include/asm/cpu_sh2.h
@@ -8,6 +8,9 @@
#ifndef _ASM_CPU_SH2_H_
#define _ASM_CPU_SH2_H_
+#if defined(CONFIG_SH2A)
+# include <asm/cpu_sh2a.h>
+#endif
#if defined(CONFIG_CPU_SH7203)
# include <asm/cpu_sh7203.h>
#elif defined(CONFIG_CPU_SH7206)
diff --git a/arch/sh/include/asm/cpu_sh2a.h b/arch/sh/include/asm/cpu_sh2a.h
new file mode 100644
index 0000000..7262a2a
--- /dev/null
+++ b/arch/sh/include/asm/cpu_sh2a.h
@@ -0,0 +1,16 @@
+#ifndef _ASM_CPU_SH2A_H_
+#define _ASM_CPU_SH2A_H_
+
+/* module enable */
+#define STBCR4 0xFFFE040C
+#define scif_enable(ch) \
+do { \
+ if (ch < 4) { \
+ unsigned char mask = 1 << (7 - ch); \
+ writeb((readb(STBCR4) & ~mask), STBCR4);\
+ } \
+} while (0)
+
+#define cmt_clock_enable() \
+ writeb((readb(STBCR4) & ~0x04), STBCR4)
+#endif
--
1.8.5.3
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