[U-Boot] [PATCH v2] zynq: Fix elf header generation

[Albert ARIBAUD]

Hi Michal,

On Wed,  5 Feb 2014 08:06:29 +0100, Michal Simek
<michal.simek at xilinx.com> wrote:

> This patch is here because of:
> "arm: keep all sections in ELF file"
> (sha1: 47ed5dd031d7d2c587e6afd386e79ccec1a1b7f7)
> 
> Our tools expect to have elf with only LOAD header.
> Without this fix also PHDR, INTERP and DYNAMIC headers
> are available in ELF.
> 
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
> 
> Changes in v2:
> - Remove empty line from zynq-common.h
> - Remove PXA linker script part
> - Add comment to explain differences between our linker script
>   and ARM one
> 
> Albert: We have discussed about patch via IRC that this
> is reasonable solution.
> I am sending it for a record and if it is fine I will add
> it to my zynq branch and then will send you pull request.
> 
> ---
>  arch/arm/cpu/armv7/zynq/u-boot.lds | 99 ++++++++++++++++++++++++++++++++++++++
>  include/configs/zynq-common.h      |  2 +
>  2 files changed, 101 insertions(+)
>  create mode 100644 arch/arm/cpu/armv7/zynq/u-boot.lds
> 
> diff --git a/arch/arm/cpu/armv7/zynq/u-boot.lds b/arch/arm/cpu/armv7/zynq/u-boot.lds
> new file mode 100644
> index 0000000..a68b050
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/zynq/u-boot.lds
> @@ -0,0 +1,99 @@
> +/*
> + * Copyright (c) 2004-2008 Texas Instruments
> + *
> + * (C) Copyright 2002
> + * Gary Jennejohn, DENX Software Engineering, <garyj at denx.de>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +OUTPUT_ARCH(arm)
> +ENTRY(_start)
> +SECTIONS
> +{
> +	. = 0x00000000;
> +
> +	. = ALIGN(4);
> +	.text :
> +	{
> +		*(.__image_copy_start)
> +		CPUDIR/start.o (.text*)
> +		*(.text*)
> +	}
> +
> +	. = ALIGN(4);
> +	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
> +
> +	. = ALIGN(4);
> +	.data : {
> +		*(.data*)
> +	}
> +
> +	. = ALIGN(4);
> +
> +	. = .;
> +
> +	. = ALIGN(4);
> +	.u_boot_list : {
> +		KEEP(*(SORT(.u_boot_list*)));
> +	}
> +
> +	. = ALIGN(4);
> +
> +	.image_copy_end :
> +	{
> +		*(.__image_copy_end)
> +	}
> +
> +	.rel_dyn_start :
> +	{
> +		*(.__rel_dyn_start)
> +	}
> +
> +	.rel.dyn : {
> +		*(.rel*)
> +	}
> +
> +	.rel_dyn_end :
> +	{
> +		*(.__rel_dyn_end)
> +	}
> +
> +	_end = .;
> +
> +/*
> + * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
> + * __bss_base and __bss_limit are for linker only (overlay ordering)
> + */
> +
> +	.bss_start __rel_dyn_start (OVERLAY) : {
> +		KEEP(*(.__bss_start));
> +		__bss_base = .;
> +	}
> +
> +	.bss __bss_base (OVERLAY) : {
> +		*(.bss*)
> +		 . = ALIGN(4);
> +		 __bss_limit = .;
> +	}
> +
> +	.bss_end __bss_limit (OVERLAY) : {
> +		KEEP(*(.__bss_end));
> +	}
> +
> +	/*
> +	 * Zynq needs to discard more sections because the user
> +	 * is expected to pass this image on to tools for boot.bin
> +	 * generation that require them to be dropped.
> +	 */
> +	/DISCARD/ : { *(.dynsym) }
> +	/DISCARD/ : { *(.dynbss*) }
> +	/DISCARD/ : { *(.dynstr*) }
> +	/DISCARD/ : { *(.dynamic*) }
> +	/DISCARD/ : { *(.plt*) }
> +	/DISCARD/ : { *(.interp*) }
> +	/DISCARD/ : { *(.gnu*) }
> +	/DISCARD/ : { *(.ARM.exidx*) }
> +	/DISCARD/ : { *(.gnu.linkonce.armexidx.*) }
> +}
> diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
> index 5faffad..d6dc745 100644
> --- a/include/configs/zynq-common.h
> +++ b/include/configs/zynq-common.h
> @@ -218,6 +218,8 @@
>  # define CONFIG_SYS_MMC_MAX_DEVICE	1
>  #endif
> 
> +#define CONFIG_SYS_LDSCRIPT  "arch/arm/cpu/armv7/zynq/u-boot.lds"
> +
>  /* Commands */
>  #include <config_cmd_default.h>
> 
> --
> 1.8.2.3
> 
> 
Applied to u-boot-arm/master, thanks!

Amicalement,
-- 
Albert.