[U-Boot] [PATCH v2] usb: tegra: Fix PHY configuration for Tegra 3

[Stefan Agner]

Am 2014-02-14 23:45, schrieb Stefan Agner:
>  	/* Select ULPI parallel interface */
> -	clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK, PTS_ULPI << PTS_SHIFT);
> +	if (!controller->has_hostpc) {
> +		clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,
> +				PTS_ULPI << PTS_SHIFT);
> +	else
> +		clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK,
> +				PTS_ULPI << PTS_SHIFT);
>  
>  	/* enable ULPI transceiver */
>  	setbits_le32(&usbctlr->susp_ctrl, ULPI_PHY_ENB);

Ok, just noticed that we need to address the different USBD register
layout on Tegra 2 here too.

Furthermore, the code does not compile with Tegra 2 header file since
the hostpc1_devlc field is missing there. The function
ehci_get_port_speed uses a define and some calculation to work around
this issue. Another solution would be to create a dummy field in the
Tegra 2 USB register header file... Any thoughts on that?