[U-Boot] [PATCH v2 1/3] spi: spi-mxc: add defines for clk inactive state for ECSPI

Markus Niebel list-09_u-boot at tqsc.de
Mon Feb 17 14:12:38 CET 2014


From: Markus Niebel <Markus.Niebel at tq-group.de>

Provide define for the SCLK_CTL field of the config reg of ECSPI.
While at it, oder the defines to improve readability and make
adding more defines easier.

Signed-off-by: Markus Niebel <Markus.Niebel at tqs.de>
---
changes for v2:
- split first patch into header changes (defines) and driver changes
- define only register flags that are used in pathches of this series
---
 arch/arm/include/asm/arch-mx5/imx-regs.h |    7 ++++---
 arch/arm/include/asm/arch-mx6/imx-regs.h |    7 ++++---
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 4955ccf..054c680 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -230,9 +230,10 @@
 #define MXC_CSPICTRL_CHAN	18
 
 /* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL		4
-#define MXC_CSPICON_PHA		0
-#define MXC_CSPICON_SSPOL	12
+#define MXC_CSPICON_PHA		0  /* SCLK phase control */
+#define MXC_CSPICON_POL		4  /* SCLK polarity */
+#define MXC_CSPICON_SSPOL	12 /* SS polarity */
+#define MXC_CSPICON_CTL		20 /* inactive state of SCLK */
 #define MXC_SPI_BASE_ADDRESSES \
 	CSPI1_BASE_ADDR, \
 	CSPI2_BASE_ADDR, \
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index f2ad6e9..3c58c01 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -405,9 +405,10 @@ struct cspi_regs {
 #define MXC_CSPICTRL_CHAN	18
 
 /* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL		4
-#define MXC_CSPICON_PHA		0
-#define MXC_CSPICON_SSPOL	12
+#define MXC_CSPICON_PHA		0  /* SCLK phase control */
+#define MXC_CSPICON_POL		4  /* SCLK polarity */
+#define MXC_CSPICON_SSPOL	12 /* SS polarity */
+#define MXC_CSPICON_CTL		20 /* inactive state of SCLK */
 #ifdef CONFIG_MX6SL
 #define MXC_SPI_BASE_ADDRESSES \
 	ECSPI1_BASE_ADDR, \
-- 
1.7.9.5



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