[U-Boot] [PATCH v3 2/3] usb: tegra: fix PHY configuration

[Stephen Warren]

On 02/16/2014 12:50 PM, Stefan Agner wrote:
> On Tegra30 and later, the PTS (parallel transceiver select) and STS
> (serial transceiver select) are part of the HOSTPC1_DEVLC_0 register
> rather than PORTSC1_0 register. Since the reset configuration
> usually matches the intended configuration, this error did not show
> up on Tegra30 devices.
> 
> Also use the slightly different bit fields of first USB, (USBD) on
> Tegra20 and move those definitions to the Tegra20 specific header
> file.

Reviewed-by: Stephen Warren <swarren at nvidia.com>

Hmm, the kernel has some potential bugs in this area as well:-( At
least, on Tegra20, phy-tegra-usb.c:set_pts() does the wrong thing on the
USB1 port. Luckily, the driver skips calling set_pts() on USB1, so this
isn't an actual issue.