[U-Boot] [PATCH] powerpc/t104xrdb: Update DDR initialization related settings

[Priyanka Jain]

Update following DDR related settings for T1040RDB, T1042RDB_PI
-Correct number of chip selects to two as t1040 supports
 two Chip selects.
-Update board_specific_parameters udimm structure with settings
 derived via calibration.
-Update ddr_raw_timing sructure corresponding to DIMM.
-Set ODT to off, as some board issues are observed.

Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s.

Signed-off-by: Priyanka Jain <Priyanka.Jain at freescale.com>
Signed-off-by: York Sun <yorksun at freescale.com>
---
 board/freescale/t104xrdb/ddr.c |    4 ++--
 board/freescale/t104xrdb/ddr.h |   31 ++++++++++++++++++-------------
 include/configs/T1040RDB.h     |    2 +-
 include/configs/T1042RDB_PI.h  |    2 +-
 4 files changed, 22 insertions(+), 17 deletions(-)

diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 9009afa..e1caecb 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -112,8 +112,8 @@ found:
 	popts->zq_en = 1;
 
 	/* DHC_EN =1, ODT = 75 Ohm */
-	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
-	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_OFF);
+	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_OFF);
 }
 
 phys_size_t initdram(int board_type)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index 9276b59..ed3da62 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -6,7 +6,6 @@
 
 #ifndef __DDR_H__
 #define __DDR_H__
-
 dimm_params_t ddr_raw_timing = {
 	.n_ranks = 2,
 	.rank_density = 2147483648u,
@@ -14,22 +13,21 @@ dimm_params_t ddr_raw_timing = {
 	.primary_sdram_width = 64,
 	.ec_sdram_width = 8,
 	.registered_dimm = 0,
-	.mirrored_dimm = 1,
+	.mirrored_dimm = 0,
 	.n_row_addr = 15,
 	.n_col_addr = 10,
 	.n_banks_per_sdram_device = 8,
 	.edc_config = 2,	/* ECC */
 	.burst_lengths_bitmask = 0x0c,
-
 	.tckmin_x_ps = 1071,
-	.caslat_x = 0x2fe << 4,	/* 5,6,7,8,9,10,11,13 */
-	.taa_ps = 13910,
+	.caslat_x = 0xfe << 4,	/* 5,6,7,8,9,10,11 */
+	.taa_ps = 13125,
 	.twr_ps = 15000,
-	.trcd_ps = 13910,
+	.trcd_ps = 13125,
 	.trrd_ps = 6000,
-	.trp_ps = 13910,
+	.trp_ps = 13125,
 	.tras_ps = 34000,
-	.trc_ps = 48910,
+	.trc_ps = 48125,
 	.trfc_ps = 260000,
 	.twtr_ps = 7500,
 	.trtp_ps = 7500,
@@ -62,11 +60,18 @@ static const struct board_specific_parameters udimm0[] = {
 	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
 	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |      |delay |
 	 */
-	{2,  1066, 4, 8,     4, 0x05070609, 0x08090a08,   0xff,    2,  0},
-	{2,  1350, 4, 4,     8, 0x0809090b, 0x0c0c0d0a,   0xff,    2,  0},
-	{2,  1350, 0, 5,     7, 0x0709090b, 0x0c0c0d09,   0xff,    2,  0},
-	{2,  1666, 4, 4,     8, 0x080a0a0d, 0x0d10100b,   0xff,    2,  0},
-	{2,  1666, 0, 5,     7, 0x080a0a0c, 0x0d0d0e0a,   0xff,    2,  0},
+	{2,  833,  4, 4,     6, 0x06060607, 0x08080807,   0xff,    2,  0},
+	{2,  833,  0, 4,     6, 0x06060607, 0x08080807,   0xff,    2,  0},
+	{2,  1350, 4, 4,     7, 0x0708080A, 0x0A0B0C09,   0xff,    2,  0},
+	{2,  1350, 0, 4,     7, 0x0708080A, 0x0A0B0C09,   0xff,    2,  0},
+	{2,  1666, 4, 4,     7, 0x0808090B, 0x0C0D0E0A,   0xff,    2,  0},
+	{2,  1666, 0, 4,     7, 0x0808090B, 0x0C0D0E0A,   0xff,    2,  0},
+	{1,  833,  4, 4,     6, 0x06060607, 0x08080807,   0xff,    2,  0},
+	{1,  833,  0, 4,     6, 0x06060607, 0x08080807,   0xff,    2,  0},
+	{1,  1350, 4, 4,     7, 0x0708080A, 0x0A0B0C09,   0xff,    2,  0},
+	{1,  1350, 0, 4,     7, 0x0708080A, 0x0A0B0C09,   0xff,    2,  0},
+	{1,  1666, 4, 4,     7, 0x0808090B, 0x0C0D0E0A,   0xff,    2,  0},
+	{1,  1666, 0, 4,     7, 0x0808090B, 0x0C0D0E0A,   0xff,    2,  0},
 	{}
 };
 
diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h
index 7cfda50..c6c214c 100644
--- a/include/configs/T1040RDB.h
+++ b/include/configs/T1040RDB.h
@@ -147,7 +147,7 @@
 
 /* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
+#define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
index ed9ca8a..5102d49 100644
--- a/include/configs/T1042RDB_PI.h
+++ b/include/configs/T1042RDB_PI.h
@@ -147,7 +147,7 @@
 
 /* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
+#define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-- 
1.7.4.1