[U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver

[Michal Simek]

On 02/27/2014 05:03 PM, Chin Liang See wrote:
> Scan Manager driver will be called to configure the IOCSR
> scan chain. This configuration will setup the IO buffer settings
> 
> Signed-off-by: Chin Liang See <clsee at altera.com>
> Cc: Dinh Nguyen <dinguyen at altera.com>
> Cc: Wolfgang Denk <wd at denx.de>
> CC: Pavel Machek <pavel at denx.de>
> Cc: Tom Rini <trini at ti.com>
> Cc: Albert Aribaud <albert.u.boot at aribaud.net>
> ---
> Changes for v6
> - Fixed various coding style issue
> Changes for v5
> - Removal of additional blank line
> - Added comment for magic number
> Changes for v4
> - avoid code duplication by add goto error
> - include underscore to variables name
> Changes for v3
> - merge the handoff file and driver into single patch
> Changes for v2
> - rebase with latest v2014.01-rc1
> ---
>  arch/arm/cpu/armv7/socfpga/Makefile                |    2 +-
>  arch/arm/cpu/armv7/socfpga/scan_manager.c          |  211 +++++++
>  arch/arm/cpu/armv7/socfpga/spl.c                   |    4 +
>  arch/arm/include/asm/arch-socfpga/scan_manager.h   |   96 +++
>  .../include/asm/arch-socfpga/socfpga_base_addrs.h  |    1 +
>  board/altera/socfpga/iocsr_config.c                |  657 ++++++++++++++++++++
>  board/altera/socfpga/iocsr_config.h                |   17 +


I still have problem with content of these two files.
In iocsr_config.c is ~600 lines which targets just one specific hardware design
configuration. I can't see any reason why this should go to mainline
and stay there. Because it brings no value.

I would recommend you just to define that arrays like this

const unsigned long iocsr_scan_chain0_table[];
const unsigned long iocsr_scan_chain0_table[];
...

+ in header
#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH        0
#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH        0
#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH        0
#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH        0

and write these 2 files by hand. Then your users will just replace them
by hand for specific board/design.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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