[U-Boot] [PATCH] board/t1040qds: Relax IFC FPGA timings

[York Sun]

On 12/11/2013 10:39 PM, Prabhakar Kushwaha wrote:
> Current IFC-FPGA TCH(Chip Select hold time with respect to WE deassertion)
> is 0 i.e. 0 ns hold time on writes. This may not work on higher clock
> freqencies.
> 
> So, Increase TCH as 0x8 i.e. 8 ip_clk.
> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
> ---

Applied to u-boot-mpc85xx/master. Thanks.

York