[U-Boot] [PATCH] arm: rmobile: Add SH QSPI base register address

[Nobuhiro Iwamatsu]

This adds base register address of SH QSPI.
Currently, SH QSPI is used only from R8A7790 and R8A7791.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>
---
 arch/arm/include/asm/arch-rmobile/r8a7790.h | 1 +
 arch/arm/include/asm/arch-rmobile/r8a7791.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/arch-rmobile/r8a7790.h b/arch/arm/include/asm/arch-rmobile/r8a7790.h
index 42d65d3..d9ea71f 100644
--- a/arch/arm/include/asm/arch-rmobile/r8a7790.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7790.h
@@ -19,6 +19,7 @@
 #define DBSC3_1_BASE		0xE67A0000
 #define TMU_BASE		0xE61E0000
 #define	GPIO5_BASE		0xE6055000
+#define SH_QSPI_BASE	0xE6B10000
 
 #define S3C_BASE		0xE6784000
 #define S3C_INT_BASE		0xE6784A00
diff --git a/arch/arm/include/asm/arch-rmobile/r8a7791.h b/arch/arm/include/asm/arch-rmobile/r8a7791.h
index 2afda0a..ff30180 100644
--- a/arch/arm/include/asm/arch-rmobile/r8a7791.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7791.h
@@ -19,6 +19,7 @@
 #define DBSC3_1_BASE	0xE67A0000
 #define TMU_BASE	0xE61E0000
 #define	GPIO5_BASE	0xE6055000
+#define SH_QSPI_BASE	0xE6B10000
 
 #define S3C_BASE	0xE6784000
 #define S3C_INT_BASE	0xE6784A00
-- 
1.8.5