[U-Boot] [PATCH 2/5] imx: mx6q_4x_mt41j128.cfg: enable ecspi3 clocks

[Stefano Babic]

Hi Christian,

On 09/01/2014 08:07, Christian Gmeiner wrote:
> Hi Stefano,
> 
>>
>>>
>>> On 08/01/2014 08:24, Christian Gmeiner wrote:
>>>> Signed-off-by: Christian Gmeiner <christian.gmeiner at gmail.com>
>>>> ---
>>>>  board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg |    2 +-
>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
>>>> index bb6c60b..b9e107a 100644
>>>> --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
>>>> +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
>>>> @@ -144,7 +144,7 @@ DATA 4 0x021b0404 0x00011006
>>>>
>>>>  /* set the default clock gate to save power */
>>>>  DATA 4 0x020c4068 0x00C03F3F
>>>> -DATA 4 0x020c406c 0x0030FC03
>>>> +DATA 4 0x020c406c 0x0030FC33
>>>>  DATA 4 0x020c4070 0x0FFFC000
>>>>  DATA 4 0x020c4074 0x3FF00000
>>>>  DATA 4 0x020c4078 0x00FFF300
>>>>
>>>
>>> I do not think a good idea to enable the clock here. We have to set only
>>> the clocks that are required for U-Boot, letting the other ones off to
>>> save power. This is a common file, and then all boards using it will
>>> have the ecspi-3 clock turned on, even if they do not require it.
>>>
>>> Better is to set the clock inside the board file only for the boards
>>> (yours !) that need it, for example in board_early_init()
>>>
>>
>> Sounds like a good plan... will rework this part for the next version.
>>
> 
> I thought more deeply about it and think that in the long term all ecspi clocks
> should get disabled and enabled as needed in the boards.

Agree - a general U-Boot rule is to enable only what is really needed by
U-Boot itself. Since a lot of time, the kernel does not make any
assumption about what a bootcounter has done and configures the whole
hardware itself (pinmux, clocks, ...).

In the long term we plan to move i.MX6 to use SPL, letting maybe only a
few registers inside the imx image file and putting the setup inside SPL
code. This will allow us in future to have a single image for all
processor's variations (solo, dual,quad).

Best regards,
Stefano Babic


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