[U-Boot] omap4460 nand booting ?

[Gupta, Pekon]

>From: abraham.varricatt at vvdntech.com 
>Hello,
>
>Thanks to the help I obtained on this mailing list, I've been able to
>customize u-boot (2013.10 release) to work on a custom omap4460 board.
>Schematically, it's similar to the pandaboard, but uses the twl6032
>pmic and has a NAND memory from micron present.
>
>I've been able to boot this board from USB and from an external mmc
>card. In both cases, I've been able to access the nand memory (i.e.
>reading/writing). My team tried writing an image of the linux kernel
>to the nand from mmc, rebooted the board, copied the image from nand
>to ddr and booted off it. At the very least, we feel that this shows
>that the memory is working properly.
>
>The problem I'm facing is that I can't seem to boot directly from the
>nand memory chip. We've set the boot configuration pins to start with
>NAND boot, but it doesn't seem to work. On probing the CS and
>nand-busy lines we can see some activity happening, but don't
>understand what it means.
>
>The way I expect the board to work, is that the ROM code should detect
>the external nand present, query for ONFI data, configure the
>bus/interface accordingly, copy SPL part of bootloader from first
>sector to internal sram and boot off that.
>
>I *think* that the omap4460 is sending the ONFI request, but after
>that, something malfunctions, nand is deemed unusable and the next
>device in boot sequence is queried. In my case its the uart and I can
>see some garbage characters coming out on the console.
>
>Any suggestions on how I could debug this?
>
If this NAND has bus-width = 16, then you need to tweak the
board file with following changes.
Below code is for AM335x platforms, you need similar for omap4 platforms
------------------------------
--- arch/arm/cpu/armv7/am33xx/mem.c
+++ arch/arm/cpu/armv7/am33xx/mem.c
@@ -64,7 +64,7 @@
 	u32 base = CONFIG_SYS_FLASH_BASE;
 #elif defined(CONFIG_NAND)
 /* configure GPMC for NAND */
-	const u32  gpmc_regs[GPMC_MAX_REG] = {	M_NAND_GPMC_CONFIG1,
+	const u32  gpmc_regs[GPMC_MAX_REG] = {	M_NAND_GPMC_CONFIG1 | 0x1000,
 						M_NAND_GPMC_CONFIG2,
 						M_NAND_GPMC_CONFIG3,
 						M_NAND_GPMC_CONFIG4,
------------------------------

with regards, pekon