[U-Boot] [PATCH] DRA7: Add support for ES1.1 silicon ID code

[Sricharan R]

On Tuesday 14 January 2014 10:24 PM, Nishanth Menon wrote:
> ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support
> for ES1.1 IDCODE change.
> 
> Signed-off-by: Nishanth Menon <nm at ti.com>
> Reviewed-by: Tom Rini <trini at ti.com>
> ---
> 
>  arch/arm/cpu/armv7/omap-common/clocks-common.c |    2 +-
>  arch/arm/cpu/armv7/omap-common/emif-common.c   |    5 ++---
>  arch/arm/cpu/armv7/omap5/hw_data.c             |    2 ++
>  arch/arm/cpu/armv7/omap5/hwinit.c              |    3 +++
>  arch/arm/cpu/armv7/omap5/sdram.c               |    4 ++++
>  arch/arm/include/asm/arch-omap5/omap.h         |    1 +
>  arch/arm/include/asm/omap_common.h             |    1 +
>  7 files changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
> index dfa3760..2883c1d 100644
> --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
> +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
> @@ -436,7 +436,7 @@ static void setup_non_essential_dplls(void)
>  #ifdef CONFIG_SYS_OMAP_ABE_SYSCK
>  	abe_ref_clk = CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK;
>  
> -	if (omap_revision() == DRA752_ES1_0)
> +	if (is_dra7xx())
>  		/* Select the sys clk for dpll_abe */
>  		clrsetbits_le32((*prcm)->cm_abe_pll_sys_clksel,
>  				CM_CLKSEL_ABE_PLL_SYS_CLKSEL_MASK,
> diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c
> index cd6289b..429c4be 100644
> --- a/arch/arm/cpu/armv7/omap-common/emif-common.c
> +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c
> @@ -179,8 +179,7 @@ void emif_update_timings(u32 base, const struct emif_regs *regs)
>  	writel(regs->temp_alert_config, &emif->emif_temp_alert_config);
>  	writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1_shdw);
>  
> -	if ((omap_revision() >= OMAP5430_ES1_0) ||
> -				(omap_revision() == DRA752_ES1_0)) {
> +	if ((omap_revision() >= OMAP5430_ES1_0) || is_dra7xx()) {
>  		writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_5_LL_0,
>  			&emif->emif_l3_config);
>  	} else if (omap_revision() >= OMAP4460_ES1_0) {
> @@ -309,7 +308,7 @@ static void ddr3_init(u32 base, const struct emif_regs *regs)
>  	 * The same sequence should work on OMAP5432 as well. But strange that
>  	 * it is not working
>  	 */
> -	if (omap_revision() == DRA752_ES1_0) {
> +	if (is_dra7xx()) {
>  		do_ext_phy_settings(base, regs);
>  		writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config);
>  		writel(regs->sdram_config_init, &emif->emif_sdram_config);
> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
> index 5268a1f..e47b454 100644
> --- a/arch/arm/cpu/armv7/omap5/hw_data.c
> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c
> @@ -639,6 +639,7 @@ void hw_data_init(void)
>  	break;
>  
>  	case DRA752_ES1_0:
> +	case DRA752_ES1_1:
>  	*prcm = &dra7xx_prcm;
>  	*dplls_data = &dra7xx_dplls;
>  	*omap_vcores = &dra752_volts;
> @@ -666,6 +667,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
>  		*regs = &ioregs_omap5432_es2;
>  		break;
>  	case DRA752_ES1_0:
> +	case DRA752_ES1_1:
>  		*regs = &ioregs_dra7xx_es1;
>  		break;
>  
> diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
> index 5386ae0..737d23c 100644
> --- a/arch/arm/cpu/armv7/omap5/hwinit.c
> +++ b/arch/arm/cpu/armv7/omap5/hwinit.c
> @@ -333,6 +333,9 @@ void init_omap_revision(void)
>  	case DRA752_CONTROL_ID_CODE_ES1_0:
>  		*omap_si_rev = DRA752_ES1_0;
>  		break;
> +	case DRA752_CONTROL_ID_CODE_ES1_1:
> +		*omap_si_rev = DRA752_ES1_1;
> +		break;
>  	default:
>  		*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
>  	}
> diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c
> index 2e18706..16a91f9 100644
> --- a/arch/arm/cpu/armv7/omap5/sdram.c
> +++ b/arch/arm/cpu/armv7/omap5/sdram.c
> @@ -245,6 +245,7 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
>  		*regs = &emif_regs_ddr3_532_mhz_1cs_es2;
>  		break;
>  	case DRA752_ES1_0:
> +	case DRA752_ES1_1:
>  		switch (emif_nr) {
>  		case 1:
>  			*regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1;
> @@ -273,6 +274,7 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
>  		*dmm_lisa_regs = &lisa_map_4G_x_2_x_2;
>  		break;
>  	case DRA752_ES1_0:
> +	case DRA752_ES1_1:
>  	default:
>  		*dmm_lisa_regs = &lisa_map_2G_x_2_x_2_2G_x_1_x_2;
>  	}
> @@ -460,6 +462,7 @@ static void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
>  		*size = ARRAY_SIZE(ddr3_ext_phy_ctrl_const_base_es2);
>  		break;
>  	case DRA752_ES1_0:
> +	case DRA752_ES1_1:
>  		if (emif_nr == 1) {
>  			*regs = dra_ddr3_ext_phy_ctrl_const_base_es1_emif1;
>  			*size =
> @@ -626,6 +629,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
>  			     sizeof(omap5_bug_00339_regs[0]);
>  		break;
>  	case DRA752_ES1_0:
> +	case DRA752_ES1_1:
>  		bug_00339_regs_ptr = dra_bug_00339_regs;
>  		*iterations = sizeof(dra_bug_00339_regs)/
>  			     sizeof(dra_bug_00339_regs[0]);
> diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
> index 5be2dee..19fdece 100644
> --- a/arch/arm/include/asm/arch-omap5/omap.h
> +++ b/arch/arm/include/asm/arch-omap5/omap.h
> @@ -44,6 +44,7 @@
>  #define OMAP5432_CONTROL_ID_CODE_ES1_0		0x0B99802F
>  #define OMAP5432_CONTROL_ID_CODE_ES2_0          0x1B99802F
>  #define DRA752_CONTROL_ID_CODE_ES1_0		0x0B99002F
> +#define DRA752_CONTROL_ID_CODE_ES1_1		0x1B99002F
>  
>  /* UART */
>  #define UART1_BASE		(OMAP54XX_L4_PER_BASE + 0x6a000)
> diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
> index a78f990..9b1f495 100644
> --- a/arch/arm/include/asm/omap_common.h
> +++ b/arch/arm/include/asm/omap_common.h
> @@ -643,6 +643,7 @@ static inline u8 is_dra7xx(void)
>  
>  /* DRA7XX */
>  #define DRA752_ES1_0	0x07520100
> +#define DRA752_ES1_1	0x07520110
>  
>  /*
>   * SRAM scratch space entries
Reviewed By: Sricharan R <r.sricharan at ti.com>

Regards,
 Sricharan