[U-Boot] [PATCH 1/9] arc: add architecture header files
Heiko Schocher
hs at denx.de
Wed Jan 29 06:44:06 CET 2014
Hello Alexey,
Thanks for your patches, more or less just nitpicking comments ...
Am 29.01.2014 00:09, schrieb Alexey Brodkin:
> Signed-off-by: Alexey Brodkin<abrodkin at synopsys.com>
No commit message, please add one. (Are this files from the Linux
kernel? If so please add a comment in the commit message + add a
hint which linux commit you used, thanks!)
>
> Cc: Mischa Jonker<mjonker at synopsys.com>
> Cc: Francois Bedard<fbedard at synopsys.com>
> ---
> arch/arc/include/asm/arch-arc700/hardware.h | 0
> arch/arc/include/asm/arcregs.h | 324 ++++++++++++++++++++++++++++
> arch/arc/include/asm/bitops.h | 19 ++
> arch/arc/include/asm/byteorder.h | 23 ++
> arch/arc/include/asm/cache.h | 23 ++
> arch/arc/include/asm/config.h | 12 ++
> arch/arc/include/asm/errno.h | 1 +
> arch/arc/include/asm/global_data.h | 19 ++
> arch/arc/include/asm/io.h | 287 ++++++++++++++++++++++++
> arch/arc/include/asm/posix_types.h | 73 +++++++
> arch/arc/include/asm/processor.h | 0
> arch/arc/include/asm/ptrace.h | 101 +++++++++
> arch/arc/include/asm/sections.h | 1 +
> arch/arc/include/asm/string.h | 0
> arch/arc/include/asm/types.h | 55 +++++
> arch/arc/include/asm/u-boot.h | 15 ++
> arch/arc/include/asm/unaligned.h | 1 +
> 17 files changed, 954 insertions(+)
> create mode 100644 arch/arc/include/asm/arch-arc700/hardware.h
> create mode 100644 arch/arc/include/asm/arcregs.h
> create mode 100644 arch/arc/include/asm/bitops.h
> create mode 100644 arch/arc/include/asm/byteorder.h
> create mode 100644 arch/arc/include/asm/cache.h
> create mode 100644 arch/arc/include/asm/config.h
> create mode 100644 arch/arc/include/asm/errno.h
> create mode 100644 arch/arc/include/asm/global_data.h
> create mode 100644 arch/arc/include/asm/io.h
> create mode 100644 arch/arc/include/asm/posix_types.h
> create mode 100644 arch/arc/include/asm/processor.h
> create mode 100644 arch/arc/include/asm/ptrace.h
> create mode 100644 arch/arc/include/asm/sections.h
> create mode 100644 arch/arc/include/asm/string.h
> create mode 100644 arch/arc/include/asm/types.h
> create mode 100644 arch/arc/include/asm/u-boot.h
> create mode 100644 arch/arc/include/asm/unaligned.h
>
> diff --git a/arch/arc/include/asm/arch-arc700/hardware.h b/arch/arc/include/asm/arch-arc700/hardware.h
> new file mode 100644
> index 0000000..e69de29
Empty file ?
> diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
> new file mode 100644
> index 0000000..87b0a60
> --- /dev/null
> +++ b/arch/arc/include/asm/arcregs.h
> @@ -0,0 +1,324 @@
> +/*
> + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef _ASM_ARC_ARCREGS_H
> +#define _ASM_ARC_ARCREGS_H
> +
> +#ifdef __KERNEL__
> +
> +/* Build Configuration Registers */
> +#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */
> +#define ARC_REG_CRC_BCR 0x62
> +#define ARC_REG_DVFB_BCR 0x64
> +#define ARC_REG_EXTARITH_BCR 0x65
> +#define ARC_REG_VECBASE_BCR 0x68
> +#define ARC_REG_PERIBASE_BCR 0x69
> +#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */
> +#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */
> +#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */
> +#define ARC_REG_TIMERS_BCR 0x75
> +#define ARC_REG_ICCM_BCR 0x78
> +#define ARC_REG_XY_MEM_BCR 0x79
> +#define ARC_REG_MAC_BCR 0x7a
> +#define ARC_REG_MUL_BCR 0x7b
> +#define ARC_REG_SWAP_BCR 0x7c
> +#define ARC_REG_NORM_BCR 0x7d
> +#define ARC_REG_MIXMAX_BCR 0x7e
> +#define ARC_REG_BARREL_BCR 0x7f
> +#define ARC_REG_D_UNCACH_BCR 0x6A
> +
> +/* status32 Bits Positions */
> +#define STATUS_AE_BIT 5 /* Exception active */
> +#define STATUS_DE_BIT 6 /* PC is in delay slot */
> +#define STATUS_U_BIT 7 /* User/Kernel mode */
> +#define STATUS_L_BIT 12 /* Loop inhibit */
> +
> +/* These masks correspond to the status word(STATUS_32) bits */
> +#define STATUS_AE_MASK (1<<STATUS_AE_BIT)
> +#define STATUS_DE_MASK (1<<STATUS_DE_BIT)
> +#define STATUS_U_MASK (1<<STATUS_U_BIT)
> +#define STATUS_L_MASK (1<<STATUS_L_BIT)
> +
> +/*
> + * ECR: Exception Cause Reg bits-n-pieces
> + * [23:16] = Exception Vector
> + * [15: 8] = Exception Cause Code
> + * [ 7: 0] = Exception Parameters (for certain types only)
> + */
> +#define ECR_VEC_MASK 0xff0000
> +#define ECR_CODE_MASK 0x00ff00
> +#define ECR_PARAM_MASK 0x0000ff
> +
> +/* Exception Cause Vector Values */
> +#define ECR_V_INSN_ERR 0x02
> +#define ECR_V_MACH_CHK 0x20
> +#define ECR_V_ITLB_MISS 0x21
> +#define ECR_V_DTLB_MISS 0x22
> +#define ECR_V_PROTV 0x23
> +#define ECR_V_TRAP 0x25
> +
> +/* Protection Violation Exception Cause Code Values */
> +#define ECR_C_PROTV_INST_FETCH 0x00
> +#define ECR_C_PROTV_LOAD 0x01
> +#define ECR_C_PROTV_STORE 0x02
> +#define ECR_C_PROTV_XCHG 0x03
> +#define ECR_C_PROTV_MISALIG_DATA 0x04
> +
> +#define ECR_C_BIT_PROTV_MISALIG_DATA 10
> +
> +/* Machine Check Cause Code Values */
> +#define ECR_C_MCHK_DUP_TLB 0x01
> +
> +/* DTLB Miss Exception Cause Code Values */
> +#define ECR_C_BIT_DTLB_LD_MISS 8
> +#define ECR_C_BIT_DTLB_ST_MISS 9
> +
> +/* Dummy ECR values for Interrupts */
> +#define event_IRQ1 0x0031abcd
> +#define event_IRQ2 0x0032abcd
> +
> +/* Auxiliary registers */
> +#define AUX_IDENTITY 4
> +#define AUX_INTR_VEC_BASE 0x25
> +
> +
> +/*
> + * Floating Pt Registers
> + * Status regs are read-only (build-time) so need not be saved/restored
> + */
> +#define ARC_AUX_FP_STAT 0x300
> +#define ARC_AUX_DPFP_1L 0x301
> +#define ARC_AUX_DPFP_1H 0x302
> +#define ARC_AUX_DPFP_2L 0x303
> +#define ARC_AUX_DPFP_2H 0x304
> +#define ARC_AUX_DPFP_STAT 0x305
> +
> +#ifndef __ASSEMBLY__
> +
> +/*
> + ******************************************************************
Bad comment style
> + * Inline ASM macros to read/write AUX Regs
> + * Essentially invocation of lr/sr insns from "C"
> + */
> +
> +#if 1
> +
> +#define read_aux_reg(reg) __builtin_arc_lr(reg)
> +
> +/* gcc builtin sr needs reg param to be long immediate */
> +#define write_aux_reg(reg_immed, val) \
> + __builtin_arc_sr((unsigned int)val, reg_immed)
> +
> +#else
Please remove dead code ...
> +
> +#define read_aux_reg(reg) \
> +({ \
> + unsigned int __ret; \
> + __asm__ __volatile__( \
> + " lr %0, [%1]" \
> + : "=r"(__ret) \
> + : "i"(reg)); \
> + __ret; \
> +})
> +
> +/*
> + * Aux Reg address is specified as long immediate by caller
> + * e.g.
> + * write_aux_reg(0x69, some_val);
> + * This generates tightest code.
> + */
> +#define write_aux_reg(reg_imm, val) \
> +({ \
> + __asm__ __volatile__( \
> + " sr %0, [%1]\n" \
> + : \
> + : "ir"(val), "i"(reg_imm)); \
> +})
> +
> +/*
> + * Aux Reg address is specified in a variable
> + * * e.g.
> + * reg_num = 0x69
> + * write_aux_reg2(reg_num, some_val);
> + * This has to generate glue code to load the reg num from
> + * memory to a reg hence not recommended.
> + */
> +#define write_aux_reg2(reg_in_var, val) \
> +({ \
> + unsigned int tmp; \
> + \
> + __asm__ __volatile__( \
> + " ld %0, [%2]\n\t" \
> + " sr %1, [%0]\n\t" \
> + : "=&r"(tmp) \
> + : "r"(val), "memory"(®_in_var)); \
> +})
> +
> +#endif
> +
> +#define READ_BCR(reg, into) \
> +{ \
> + unsigned int tmp; \
> + tmp = read_aux_reg(reg); \
> + if (sizeof(tmp) == sizeof(into)) { \
> + into = *((typeof(into) *)&tmp); \
> + } else { \
> + extern void bogus_undefined(void); \
> + bogus_undefined(); \
> + } \
> +}
Why do you use defines here instead of real functions?
> +
> +#define WRITE_BCR(reg, into) \
> +{ \
> + unsigned int tmp; \
> + if (sizeof(tmp) == sizeof(into)) { \
> + tmp = (*(unsigned int *)(into)); \
> + write_aux_reg(reg, tmp); \
> + } else { \
> + extern void bogus_undefined(void); \
> + bogus_undefined(); \
> + } \
> +}
and here?
> +
> +/* Helpers */
> +#define TO_KB(bytes) ((bytes)>> 10)
> +#define TO_MB(bytes) (TO_KB(bytes)>> 10)
> +#define PAGES_TO_KB(n_pages) ((n_pages)<< (PAGE_SHIFT - 10))
> +#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages)>> 10)
[...]
> diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h
> new file mode 100644
> index 0000000..e69de29
Hups, one more empty file ...
> diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h
> new file mode 100644
> index 0000000..3b2df87
> --- /dev/null
> +++ b/arch/arc/include/asm/ptrace.h
> @@ -0,0 +1,101 @@
> +/*
> + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __ASM_ARC_PTRACE_H
> +#define __ASM_ARC_PTRACE_H
> +
> +#ifndef __ASSEMBLY__
> +
> +/* THE pt_regs: Defines how regs are saved during entry into kernel */
Is the "THE" a shortcut?
> +
> +struct pt_regs {
> + /* Real registers */
> + long bta; /* bta_l1, bta_l2, erbta */
> +
> + long lp_start, lp_end, lp_count;
> +
> + long status32; /* status32_l1, status32_l2, erstatus */
> + long ret; /* ilink1, ilink2 or eret */
> + long blink;
> + long fp;
> + long r26; /* gp */
> +
> + long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
> +
> + long sp; /* user/kernel sp depending on where we came from */
> + long orig_r0;
> +
> + /*
> + * To distinguish bet excp, syscall, irq
> + * For traps and exceptions, Exception Cause Register.
> + * ECR:<00> <VV> <CC> <PP>
> + * Last word used by Linux for extra state mgmt (syscall-restart)
> + * For interrupts, use artificial ECR values to note current prio-level
> + */
> + union {
> + struct {
> +#ifdef CONFIG_CPU_BIG_ENDIAN
> + unsigned long state:8, ecr_vec:8,
> + ecr_cause:8, ecr_param:8;
> +#else
> + unsigned long ecr_param:8, ecr_cause:8,
> + ecr_vec:8, state:8;
> +#endif
> + };
> + unsigned long event;
> + };
> +
> + long user_r25;
> +};
> +
> +/* Callee saved registers - need to be saved only when you are scheduled out */
> +
> +struct callee_regs {
> + long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
> +};
> +
> +#define instruction_pointer(regs) ((regs)->ret)
> +#define profile_pc(regs) instruction_pointer(regs)
> +
> +/* return 1 if user mode or 0 if kernel mode */
> +#define user_mode(regs) (regs->status32& STATUS_U_MASK)
> +
> +#define user_stack_pointer(regs)\
> +({ unsigned int sp; \
> + if (user_mode(regs)) \
> + sp = (regs)->sp;\
> + else \
> + sp = -1; \
> + sp; \
> +})
> +
> +/* return 1 if PC in delay slot */
> +#define delay_mode(regs) ((regs->status32& STATUS_DE_MASK) == STATUS_DE_MASK)
> +
> +#define in_syscall(regs) ((regs->ecr_vec == ECR_V_TRAP)&& !regs->ecr_param)
> +#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP)&& regs->ecr_param)
> +
> +#define STATE_SCALL_RESTARTED 0x01
> +
> +#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED)
> +#define syscall_restartable(reg) !(reg->state& STATE_SCALL_RESTARTED)
> +
> +#define current_pt_regs() \
> +({ \
> + /* open-coded current_thread_info() */ \
> + register unsigned long sp asm ("sp"); \
> + unsigned long pg_start = (sp& ~(THREAD_SIZE - 1)); \
> + (struct pt_regs *)(pg_start + THREAD_SIZE) - 1; \
> +})
> +
> +static inline long regs_return_value(struct pt_regs *regs)
> +{
> + return regs->r0;
> +}
> +
> +#endif /* !__ASSEMBLY__ */
> +
> +#endif /* __ASM_ARC_PTRACE_H */
> diff --git a/arch/arc/include/asm/sections.h b/arch/arc/include/asm/sections.h
> new file mode 100644
> index 0000000..2b8c516
> --- /dev/null
> +++ b/arch/arc/include/asm/sections.h
> @@ -0,0 +1 @@
> +#include<asm-generic/sections.h>
> diff --git a/arch/arc/include/asm/string.h b/arch/arc/include/asm/string.h
> new file mode 100644
> index 0000000..e69de29
empty file
> diff --git a/arch/arc/include/asm/types.h b/arch/arc/include/asm/types.h
> new file mode 100644
> index 0000000..7475db1
> --- /dev/null
> +++ b/arch/arc/include/asm/types.h
> @@ -0,0 +1,55 @@
> +/*
> + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __ASM_ARC_TYPES_H
> +#define __ASM_ARC_TYPES_H
> +
> +typedef unsigned short umode_t;
> +
> +/*
> + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
> + * header files exported to user space
> + */
> +
> +typedef __signed__ char __s8;
> +typedef unsigned char __u8;
> +
> +typedef __signed__ short __s16;
> +typedef unsigned short __u16;
> +
> +typedef __signed__ int __s32;
> +typedef unsigned int __u32;
> +
> +#if defined(__GNUC__)&& !defined(__STRICT_ANSI__)
> +typedef __signed__ long long __s64;
> +typedef unsigned long long __u64;
> +#endif
> +
> +/*
> + * These aren't exported outside the kernel to avoid name space clashes
> + */
> +typedef signed char s8;
> +typedef unsigned char u8;
> +
> +typedef signed short s16;
> +typedef unsigned short u16;
> +
> +typedef signed int s32;
> +typedef unsigned int u32;
> +
> +typedef signed long long s64;
> +typedef unsigned long long u64;
> +
> +#define BITS_PER_LONG 32
> +
> +/* Dma addresses are 32-bits wide. */
> +
> +typedef u32 dma_addr_t;
> +
> +typedef unsigned long phys_addr_t;
> +typedef unsigned long phys_size_t;
> +
> +#endif /* __ASM_ARC_TYPES_H */
> diff --git a/arch/arc/include/asm/u-boot.h b/arch/arc/include/asm/u-boot.h
> new file mode 100644
> index 0000000..e354edf
> --- /dev/null
> +++ b/arch/arc/include/asm/u-boot.h
> @@ -0,0 +1,15 @@
> +/*
> + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __ASM_ARC_U_BOOT_H__
> +#define __ASM_ARC_U_BOOT_H__
> +
> +#include<asm-generic/u-boot.h>
> +
> +/* For image.h:image_check_target_arch() */
> +#define IH_ARCH_DEFAULT IH_ARCH_ARC
> +
> +#endif /* __ASM_ARC_U_BOOT_H__ */
> diff --git a/arch/arc/include/asm/unaligned.h b/arch/arc/include/asm/unaligned.h
> new file mode 100644
> index 0000000..6cecbbb
> --- /dev/null
> +++ b/arch/arc/include/asm/unaligned.h
> @@ -0,0 +1 @@
> +#include<asm-generic/unaligned.h>
bye,
Heiko
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