[U-Boot] [TEST_ONLY V2 10/10] Pit WIP

[Ajay kumar]

Hi Denk,


On Thu, Jun 26, 2014 at 2:16 PM, Wolfgang Denk <wd at denx.de> wrote:
> Dear Ajay Kumar,
>
> In message <1403769668-2026-11-git-send-email-ajaykumar.rs at samsung.com> you wrote:
>> WIP patch to enable cros-ec on peach_pit.
This Entire patch is a TEST_ONLY since it is still WIP(Work In Progress).
That would mean somebody else is already working on it, but he/she hasn't sent
that patchset yet, and till that comes up in the mailing list, this WIP patch
can be used for testing the dependent patches.
So, this would not be merged into the tree, but I thought its better to send
it with a TEST_ONLY tag, so that maintainers can test this patchset.

Regards,
Ajay Kumar

> Do you think anybody would be able to figure out what this is supposed
> to mean?  I can't...
>
>> @@ -0,0 +1,212 @@
>> +/*
>> + * Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
>> + * Use of this source code is governed by a BSD-style license that can be
>> + * found in the LICENSE file.
>> + *
>> + * Alternatively, this software may be distributed under the terms of the
>> + * GNU General Public License ("GPL") version 2 as published by the Free
>> + * Software Foundation.
>> + */
>
> Please use SPDX license tags, and make sure to use GPL-2.0+ rather
> than GPL-2.0
>
>> diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
>> index c92276f..2969184 100644
>> --- a/drivers/spi/exynos_spi.c
>> +++ b/drivers/spi/exynos_spi.c
>> @@ -428,10 +428,6 @@ void spi_cs_activate(struct spi_slave *slave)
>>       clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
>>       debug("Activate CS, bus %d\n", spi_slave->slave.bus);
>>       spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE;
>> -
>> -     /* Remember time of this transaction so we can honour the bus delay */
>> -     if (spi_slave->bus->deactivate_delay_us)
>> -             spi_slave->last_transaction_us = timer_get_us();
>>  }
>>
>>  /**
>> @@ -445,6 +441,11 @@ void spi_cs_deactivate(struct spi_slave *slave)
>>       struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
>>
>>       setbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
>> +
>> +     /* Remember time of this transaction so we can honour the bus delay */
>> +     if (spi_slave->bus->deactivate_delay_us)
>> +             spi_slave->last_transaction_us = timer_get_us();
>> +
>>       debug("Deactivate CS, bus %d\n", spi_slave->slave.bus);
>>  }
>
> Is this really a related change, or shoudl that go into a separate
> commit?
>
>> diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
>> index 7ddea9b..7d81fbd 100644
>> --- a/drivers/spi/spi.c
>> +++ b/drivers/spi/spi.c
>> @@ -53,6 +53,8 @@ struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
>>               mode |= SPI_CPHA;
>>       if (fdtdec_get_bool(blob, node, "spi-cs-high"))
>>               mode |= SPI_CS_HIGH;
>> +     if (fdtdec_get_bool(blob, node, "spi-half-duplex"))
>> +             mode |= SPI_PREAMBLE;
>>       return spi_setup_slave(busnum, cs, max_hz, mode);
>
> Ditto?
>
>> diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
>> index e36a031..4e316b9 100644
>> --- a/include/configs/exynos5-dt.h
>> +++ b/include/configs/exynos5-dt.h
>> @@ -37,8 +37,8 @@
>>  #define CONFIG_TRACE_EARLY_ADDR              0x50000000
>>
>>  /* Keep L2 Cache Disabled */
>> -#define CONFIG_SYS_DCACHE_OFF
>>  #define CONFIG_SYS_CACHELINE_SIZE    64
>> +#define CONFIG_CMD_CACHE
>
> Ditto?
>
> Best regards,
>
> Wolfgang Denk
>
> --
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