[PATCH 1/3] CONFIG_ARMV7_NONSEC compile fixes

[Tim Sander]

---
 arch/arm/cpu/u-boot.lds               |    1 +
 board/altera/socfpga/socfpga_common.c |   16 ++++++++++++++++
 include/configs/socfpga_cyclone5.h    |    4 ++++
 3 files changed, 21 insertions(+)

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index e6b202b..1ea1ac2 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -88,6 +88,7 @@ SECTIONS
 		__bss_end__ = .;
 	}
 
+	.rel.plt : { *(.rel.plt) }
 	/DISCARD/ : { *(.dynstr*) }
 	/DISCARD/ : { *(.dynamic*) }
 	/DISCARD/ : { *(.plt*) }
diff --git a/board/altera/socfpga/socfpga_common.c b/board/altera/socfpga/socfpga_common.c
index 5e459bb..8f6d215 100644
--- a/board/altera/socfpga/socfpga_common.c
+++ b/board/altera/socfpga/socfpga_common.c
@@ -81,4 +81,20 @@ int designware_board_phy_init(struct eth_device *dev, int phy_addr,
 	}
 	return 0;
 }
+
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+/* Setting the address at which secondary cores start from.
+ * Versatile Express uses one address for all cores, so ignore corenr
+ */
+void smp_set_core_boot_addr(unsigned long addr, int corenr)
+{
+    /* The SYSFLAGS register on VExpress needs to be cleared first
+     * by writing to the next address, since any writes to the address
+     * at offset 0 will only be ORed in
+     */
+    writel(~0, CONFIG_SYSFLAGS_ADDR + 4);
+    writel(addr, CONFIG_SYSFLAGS_ADDR);
+}
+#endif
+
 #endif
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 106c52c..a2b8b3b 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -35,4 +35,8 @@
 #define CONFIG_EPHY_PHY_ADDR		CONFIG_EPHY1_PHY_ADDR
 #define CONFIG_PHY_INTERFACE_MODE	SOCFPGA_PHYSEL_ENUM_RGMII
 
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_SYSFLAGS_ADDR        0x1c010030
+#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
+
 #endif	/* __CONFIG_H */
-- 
1.7.9.5


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