[U-Boot] [PATCH 3/6] fpga: Define bitstream type based on command selection
Michal Simek
michal.simek at xilinx.com
Fri May 2 15:34:43 CEST 2014
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---
Preparation patch for support partial bitstream loading.
---
board/matrix_vision/common/mv_common.c | 2 +-
common/cmd_fpga.c | 10 ++++++----
drivers/fpga/fpga.c | 8 +++++---
drivers/fpga/spartan2.c | 3 ++-
drivers/fpga/spartan3.c | 3 ++-
drivers/fpga/virtex2.c | 3 ++-
drivers/fpga/xilinx.c | 10 ++++++----
drivers/fpga/zynqpl.c | 4 ++--
include/fpga.h | 10 ++++++++--
include/xilinx.h | 5 +++--
10 files changed, 37 insertions(+), 21 deletions(-)
diff --git a/board/matrix_vision/common/mv_common.c b/board/matrix_vision/common/mv_common.c
index 70133b5..1be5aba 100644
--- a/board/matrix_vision/common/mv_common.c
+++ b/board/matrix_vision/common/mv_common.c
@@ -77,7 +77,7 @@ int mv_load_fpga(void)
return -1;
}
- result = fpga_load(0, fpga_data, data_size);
+ result = fpga_load(0, fpga_data, data_size, BIT_FULL);
if (!result)
bootstage_mark(BOOTSTAGE_ID_START);
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index 68b5427..4fafed9 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -148,11 +148,11 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
break;
case FPGA_LOAD:
- rc = fpga_load(dev, fpga_data, data_size);
+ rc = fpga_load(dev, fpga_data, data_size, BIT_FULL);
break;
case FPGA_LOADB:
- rc = fpga_loadbitstream(dev, fpga_data, data_size);
+ rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL);
break;
#if defined(CONFIG_CMD_FPGA_LOADMK)
@@ -182,7 +182,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
data = (ulong)image_get_data(hdr);
data_size = image_get_data_size(hdr);
}
- rc = fpga_load(dev, (void *)data, data_size);
+ rc = fpga_load(dev, (void *)data, data_size,
+ BIT_FULL);
}
break;
#if defined(CONFIG_FIT)
@@ -224,7 +225,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
return 1;
}
- rc = fpga_load(dev, fit_data, data_size);
+ rc = fpga_load(dev, fit_data, data_size,
+ BIT_FULL);
}
break;
#endif
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index b940d9b..e770950 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -173,7 +173,8 @@ int fpga_add(fpga_type devtype, void *desc)
/*
* Convert bitstream data and load into the fpga
*/
-int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
+int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+ bitstream_type bstype)
{
printf("Bitstream support not implemented for this FPGA device\n");
return FPGA_FAIL;
@@ -182,7 +183,7 @@ int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
/*
* Generic multiplexing code
*/
-int fpga_load(int devnum, const void *buf, size_t bsize)
+int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
{
int ret_val = FPGA_FAIL; /* assume failure */
const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
@@ -192,7 +193,8 @@ int fpga_load(int devnum, const void *buf, size_t bsize)
switch (desc->devtype) {
case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
- ret_val = xilinx_load(desc->devdesc, buf, bsize);
+ ret_val = xilinx_load(desc->devdesc, buf, bsize,
+ bstype);
#else
fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 7054056..859fb3c 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -41,7 +41,8 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
+ bitstream_type bstype)
{
int ret_val = FPGA_FAIL;
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 5c9412c..b0213e6 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -45,7 +45,8 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
+ bitstream_type bstype)
{
int ret_val = FPGA_FAIL;
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index e092147..0d2d9a4 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -90,7 +90,8 @@ static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
+ bitstream_type bstype)
{
int ret_val = FPGA_FAIL;
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 8837f5c..ab9f517 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -24,7 +24,8 @@ static int xilinx_validate(xilinx_desc *desc, char *fn);
/* ------------------------------------------------------------------------- */
-int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
+int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+ bitstream_type bstype)
{
unsigned int length;
unsigned int swapsize;
@@ -127,17 +128,18 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
dataptr += 4;
printf(" bytes in bitstream = %d\n", swapsize);
- return fpga_load(devnum, dataptr, swapsize);
+ return fpga_load(devnum, dataptr, swapsize, bstype);
}
-int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize)
+int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
+ bitstream_type bstype)
{
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
return FPGA_FAIL;
}
- return desc->operations->load(desc, buf, bsize);
+ return desc->operations->load(desc, buf, bsize, bstype);
}
int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index c066f21..572c078 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -357,8 +357,8 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
return 0;
}
-
-static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
+ bitstream_type bstype)
{
unsigned long ts; /* Timestamp */
u32 partialbit = 0;
diff --git a/include/fpga.h b/include/fpga.h
index 15e603a..a55e49f 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -36,12 +36,18 @@ typedef struct { /* typedef fpga_desc */
} fpga_desc; /* end, typedef fpga_desc */
+typedef enum {
+ BIT_FULL = 0,
+} bitstream_type;
+
/* root function definitions */
extern void fpga_init(void);
extern int fpga_add(fpga_type devtype, void *desc);
extern int fpga_count(void);
-extern int fpga_load(int devnum, const void *buf, size_t bsize);
-extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size);
+extern int fpga_load(int devnum, const void *buf, size_t bsize,
+ bitstream_type bstype);
+extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+ bitstream_type bstype);
extern int fpga_dump(int devnum, const void *buf, size_t bsize);
extern int fpga_info(int devnum);
extern const fpga_desc *const fpga_validate(int devnum, const void *buf,
diff --git a/include/xilinx.h b/include/xilinx.h
index f06b214..9600432 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -45,14 +45,15 @@ typedef struct { /* typedef xilinx_desc */
} xilinx_desc; /* end, typedef xilinx_desc */
struct xilinx_fpga_op {
- int (*load)(xilinx_desc *, const void *, size_t);
+ int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);
int (*dump)(xilinx_desc *, const void *, size_t);
int (*info)(xilinx_desc *);
};
/* Generic Xilinx Functions
*********************************************************************/
-int xilinx_load(xilinx_desc *desc, const void *image, size_t size);
+int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
+ bitstream_type bstype);
int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
int xilinx_info(xilinx_desc *desc);
--
1.8.2.3
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