[U-Boot] [UBOOT][PATCH 2/3] am43xx_evm: Add qspi and qspiboot targets
Sourav Poddar
sourav.poddar at ti.com
Mon May 5 15:53:59 CEST 2014
Only the ePOS EVM has QSPI as an option and QSPI and NAND are mutually
exclusive. Add a qspi target that can see QSPI and work with it (as we
cannot do the pinmux for both QSPI and NAND at the same time) and a
qspiboot target that can be written to QSPI and booted (we are XIP and
thus need a different CONFIG_SYS_TEXT_BASE than normal).
Signed-off-by: Sourav Poddar <sourav.poddar at ti.com>
Signed-off-by: Tom Rini <trini at ti.com>
---
arch/arm/cpu/armv7/am33xx/board.c | 6 ++++--
arch/arm/cpu/armv7/am33xx/emif4.c | 3 ++-
board/ti/am43xx/Makefile | 2 +-
board/ti/am43xx/board.c | 2 +-
board/ti/am43xx/mux.c | 4 ++++
boards.cfg | 3 +++
include/configs/am43xx_evm.h | 39 ++++++++++++++++++++++++++-----------
include/configs/ti_armv7_common.h | 2 +-
8 files changed, 44 insertions(+), 17 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index fb44cc8..93bdd9d 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -142,7 +142,8 @@ int arch_misc_init(void)
return 0;
}
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) || \
+ defined(CONFIG_QSPI_XIP)
/*
* This function is the place to do per-board things such as ramp up the
* MPU clock frequency.
@@ -202,7 +203,8 @@ static void watchdog_disable(void)
}
#endif
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) || \
+ defined(CONFIG_QSPI_XIP)
void s_init(void)
{
/*
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index 3e39752..f3fe53b 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -35,7 +35,8 @@ void dram_init_banksize(void)
}
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) || \
+ defined(CONFIG_QSPI_XIP)
#ifdef CONFIG_TI81XX
static struct dmm_lisa_map_regs *hw_lisa_map_regs =
(struct dmm_lisa_map_regs *)DMM_BASE;
diff --git a/board/ti/am43xx/Makefile b/board/ti/am43xx/Makefile
index cb5fe88..7d12363 100644
--- a/board/ti/am43xx/Makefile
+++ b/board/ti/am43xx/Makefile
@@ -6,7 +6,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
-ifdef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_QSPI_XIP),y)
obj-y := mux.o
endif
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index d744977..7cc5a0e 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -70,7 +70,7 @@ static int read_eeprom(struct am43xx_board_id *header)
return 0;
}
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_QSPI_XIP)
#define NUM_OPPS 6
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index 77c53d2..3cfaf7c 100644
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -73,6 +73,7 @@ static struct module_pin_mux gpio5_7_pin_mux[] = {
{-1},
};
+#ifdef CONFIG_QSPI
static struct module_pin_mux qspi_pin_mux[] = {
{OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */
{OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */
@@ -82,6 +83,7 @@ static struct module_pin_mux qspi_pin_mux[] = {
{OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */
{-1},
};
+#endif
void enable_uart0_pin_mux(void)
{
@@ -99,7 +101,9 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(rgmii1_pin_mux);
} else if (board_is_eposevm()) {
configure_module_pin_mux(rmii1_pin_mux);
+#ifdef CONFIG_QSPI
configure_module_pin_mux(qspi_pin_mux);
+#endif
}
}
diff --git a/boards.cfg b/boards.cfg
index d6d5bb3..588ef5d 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -276,6 +276,9 @@ Active arm armv7 am33xx ti am335x
Active arm armv7 am33xx ti am335x am335x_evm_uart5 am335x_evm:SERIAL6,CONS_INDEX=6,NAND Tom Rini <trini at ti.com>
Active arm armv7 am33xx ti am335x am335x_evm_usbspl am335x_evm:SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT Tom Rini <trini at ti.com>
Active arm armv7 am33xx ti am43xx am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1 Lokesh Vutla <lokeshvutla at ti.com>
+Active arm armv7 am33xx ti am43xx am43xx_evm_qspi am43xx_evm:SERIAL1,CONS_INDEX=1,QSPI Sourav Poddar <sourav.poddar at ti.com>
+Active arm armv7 am33xx ti am43xx am43xx_evm_qspiboot am43xx_evm:SERIAL1,CONS_INDEX=1,QSPI,QSPI_XIP Sourav Poddar <sourav.poddar at ti.com>
+
Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter <matt.porter at linaro.org>
Active arm armv7 am33xx ti ti816x ti816x_evm - -
Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_mmc sama5d3_xplained:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen at atmel.com>
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 614857d..a44ec8c 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -46,7 +46,7 @@
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_XIP)
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
@@ -65,8 +65,6 @@
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
-#define CONFIG_ENV_IS_NOWHERE
-
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
/* SPL USB Support */
@@ -84,6 +82,32 @@
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
+#ifdef CONFIG_QSPI_XIP
+#define CONFIG_SYS_TEXT_BASE 0x30000000
+#endif
+
+#ifdef CONFIG_QSPI
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
+#define CONFIG_ENV_OFFSET 0x110000
+#define CONFIG_ENV_OFFSET_REDUND 0x120000
+ #ifdef MTDIDS_DEFAULT
+ #undef MTDIDS_DEFAULT
+ #endif
+ #ifdef MTDPARTS_DEFAULT
+ #undef MTDPARTS_DEFAULT
+ #endif
+#define MTDPARTS_DEFAULT "mtdparts=qspi.0:512k(QSPI.u-boot)," \
+ "512k(QSPI.u-boot.backup)," \
+ "64k(QSPI.u-boot-spl-os)," \
+ "64k(QSPI.u-boot-env)," \
+ "64k(QSPI.u-boot-env.backup)," \
+ "8m(QSPI.kernel)," \
+ "-(QSPI.file-system)"
+#endif
+
/* SPI */
#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_QSPI
@@ -92,18 +116,11 @@
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_TI_SPI_MMAP
+#define CONFIG_SPI_FLASH_BAR
#define CONFIG_QSPI_SEL_GPIO 48
#define CONFIG_SF_DEFAULT_SPEED 48000000
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
-/* SPI SPL */
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-
/* Enhance our eMMC support / experience. */
#define CONFIG_CMD_GPT
#define CONFIG_EFI_PARTITION
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 69d69a5..75dcb15 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -173,7 +173,7 @@
* under common/spl/. Given our generally common memory map, we set a
* number of related defaults and sizes here.
*/
-#ifndef CONFIG_NOR_BOOT
+#if !defined(CONFIG_NOR_BOOT) && !defined(CONFIG_QSPI_XIP)
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_OS_BOOT
--
1.7.9.5
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