[U-Boot] [PATCH] drivers/usb : Introduce APIs for fsl usb registers

[Nikhil Badola]

Introduce new APIs to write fsl usb registers that have w1c bits.
Existing API framework do not take care of w1c bits

Signed-off-by: Nikhil Badola <nikhil.badola at freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh at freescale.com>
---
 drivers/usb/host/ehci-fsl.c | 17 ++++++++++++-----
 include/usb/ehci-fsl.h      |  6 ++++++
 2 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 6cb4d98..3be69c4 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -104,15 +104,22 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 
 	if (!strncmp(phy_type, "utmi", 4)) {
 #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
-		setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
-		setbits_be32(&ehci->control, UTMI_PHY_EN);
+		fsl_usb_setbits(&ehci->control, PHY_CLK_SEL_UTMI,
+				CONTROL_REGISTER_W1C_MASK);
+		fsl_usb_setbits(&ehci->control, UTMI_PHY_EN,
+				CONTROL_REGISTER_W1C_MASK);
 		udelay(1000); /* delay required for PHY Clk to appear */
 #endif
 		out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
-		setbits_be32(&ehci->control, USB_EN);
+		fsl_usb_setbits(&ehci->control, USB_EN,
+				CONTROL_REGISTER_W1C_MASK);
 	} else {
-		setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
-		clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN);
+		fsl_usb_setbits(&ehci->control, PHY_CLK_SEL_ULPI,
+				CONTROL_REGISTER_W1C_MASK);
+		fsl_usb_clrbits(&ehci->control, UTMI_PHY_EN,
+				CONTROL_REGISTER_W1C_MASK);
+		fsl_usb_setbits(&ehci->control, USB_EN,
+				CONTROL_REGISTER_W1C_MASK);
 		udelay(1000); /* delay required for PHY Clk to appear */
 		if (!usb_phy_clk_valid(ehci))
 			return -EINVAL;
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index c9ee1d5..fb3d6b4 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -11,6 +11,12 @@
 
 #include <asm/processor.h>
 
+#define CONTROL_REGISTER_W1C_MASK       0x00020000  /* W1C: PHY_CLK_VALID */
+#define fsl_usb_setbits(_addr, _v, _mask) out_be32((_addr), \
+			((in_be32(_addr) & ~_mask) | _v))
+#define fsl_usb_clrbits(_addr, _v, _mask) out_be32((_addr), \
+			((in_be32(_addr) & ~_mask) & ~_v))
+
 /* Global offsets */
 #define FSL_SKIP_PCI		0x100
 
-- 
1.7.11.7