[U-Boot] [PATCH] powerpc/mpc85xx: SECURE BOOT- corrected CSPR settings for BSC9132QDS NAND

[Aneesh Bansal]

In case of secure boot from NAND, CSPR and FTIM settings are
same as non-secure NAND boot. CSPR0 is configured as NAND and
CSPR1 is configured as NOR.

Signed-off-by: Aneesh Bansal <aneesh.bansal at freescale.com>
---
 include/configs/BSC9132QDS.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 37e8725..2234874 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -361,7 +361,7 @@ combinations. this should be removed later
 #endif
 
 /* Set up IFC registers for boot location NOR/NAND */
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT)
 #define CONFIG_SYS_CSPR0		CONFIG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK0		CONFIG_SYS_NAND_AMASK
 #define CONFIG_SYS_CSOR0		CONFIG_SYS_NAND_CSOR
-- 
1.8.1.4