[U-Boot] [PATCH 2/2] ARMv7: at91: enable ICache and DCache.

[Josh Wu]

As SAMA5D3 is a at91 ARMv7 cpu, so we should enable LCD DCache
flush for SAMA5D3X-EK.

Signed-off-by: Josh Wu <josh.wu at atmel.com>
---
 arch/arm/cpu/armv7/at91/cpu.c       |    6 ++++++
 board/atmel/sama5d3xek/sama5d3xek.c |    6 +++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/at91/cpu.c b/arch/arm/cpu/armv7/at91/cpu.c
index 2fbf60d..6f2164f 100644
--- a/arch/arm/cpu/armv7/at91/cpu.c
+++ b/arch/arm/cpu/armv7/at91/cpu.c
@@ -61,6 +61,12 @@ int print_cpuinfo(void)
 
 void enable_caches(void)
 {
+#ifndef CONFIG_SYS_ICACHE_OFF
+	icache_enable();
+#endif
+#ifndef CONFIG_SYS_DCACHE_OFF
+	dcache_enable();
+#endif
 }
 
 unsigned int get_chip_id(void)
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index c835c12..1fc91d9 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -200,8 +200,12 @@ int board_init(void)
 		at91_gmac_hw_init();
 #endif
 #ifdef CONFIG_LCD
-	if (has_lcdc())
+	if (has_lcdc()) {
 		sama5d3xek_lcd_hw_init();
+
+		/* Enable flushing as we enabled dcache */
+		lcd_set_flush_dcache(1);
+	}
 #endif
 	return 0;
 }
-- 
1.7.9.5