[U-Boot] Cannot source LVDS from SATA on MX6DL/SOLO

[Fabio Estevam]

Hi Marek,

About the following piece of code in enable_pcie_clock:

int enable_pcie_clock(void)
....
     * Switch LVDS clock source to SATA (0xb), disable clock INPUT and
     * enable clock OUTPUT. This is important for PCI express link that
     * is clocked from the i.MX6.
     */
#define ANADIG_ANA_MISC1_LVDSCLK1_IBEN        (1 << 12)
#define ANADIG_ANA_MISC1_LVDSCLK1_OBEN        (1 << 10)
#define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_MASK    0x0000001F
    clrsetbits_le32(&anatop_regs->ana_misc1,
            ANADIG_ANA_MISC1_LVDSCLK1_IBEN |
            ANADIG_ANA_MISC1_LVDS1_CLK_SEL_MASK,
            ANADIG_ANA_MISC1_LVDSCLK1_OBEN | 0xb);

0xb is not a valid value for MX6DL/SOLO as they do not have the SATA controller.

So we need to source it from somewhere else.

Any suggestions?

Thanks,

Fabio Estevam