[U-Boot] [PATCH v2 1/2] Exynos5420: Introduce support for the Peach-Pit board

[Akshay Saraswat]

Hi Simon,

>Hi Akshay,
>
>On 21 May 2014 23:23, Akshay Saraswat <akshay.s at samsung.com> wrote:
>> While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit
>> line of devices, there could be other boards using the same chip, so a
>> common configuration file is being added (exynos5420.h) as well
>> as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi).
>>
>> The peach board as declared in boards.cfg is a copy of smdk5420
>> declaration. The configuration files are similar, but define different
>> default device trees, console serial ports and prompts.
>>
>> The device tree files for smdk5420 and peach-pit inherit from the same
>> common file.
>>
>> Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
>> Signed-off-by: Akshay Saraswat <akshay.s at samsung.com>
>> Acked-by: Simon Glass <sjg at chromium.org>
>
>This looks good to me. I think you might have an extra space in the
>last column of your boards.cfg addition, and CONFIG_CHROMEOS_PEACH
>might not be needed.
>

Will fix these in the next version.

>
>But I can't get pit to boot with these patches - it hangs in SPL. Do
>you know what is going on?
>

For me, these patches are working fine. I have tested them over three different pit boards.
I am not sure what could be wrong. I will try over more of those boards, if I witness
something like this I will update.

>
>9276cf9 (HEAD, try-pit) Exynos5420: DMC: Add software read leveling
>7706877 DMC: exynos5420: Gate CLKM to when reading PHY_CON13
>0bc31a0 Exynos5420: Remove code for enabling read leveling
>cc36404 Exynos5: DMC: Modify the definition of ddr3_mem_ctrl_init
>4544c39 Exynos: Make sure ps_hold gets set in the SPL
>f08ba9d Exynos5420: Let macros be used for exynos5420
>5620192 Exynos5420: Introduce support for the Peach-Pit board
>73e3bea (samsung/master) ARM: exynos5420: removed undefined gpio structure
>
>Regards,
>Simon
>

Regards,
Akshay Saraswat