[U-Boot] [RFCv2a PATCH 12/14] build: split CONFIG_SPL_TEXT_BASE into two different macros

[Masahiro Yamada]

We are about to move CONFIG_SPL_TEXT_BASE from header files to defconfig.
But we cannot move them as they are.

The problem is that #ifdef statements are used in board headers with
TPL support. Like this:

  #ifdef CONFIG_TPL_BUILD
  #define CONFIG_SPL_TEXT_BASE    0xD0001000
  #elif defined(CONFIG_SPL_BUILD)
  #define CONFIG_SPL_TEXT_BASE    0xff800000
  #endif

We cannot describe conditinal statments in defconfig.
One possible solution is to add CONFIG_TPL_TEXT_BASE.

This commit modifies the code as follow:

  #ifdef CONFIG_TPL_BUILD
  #define CONFIG_TPL_TEXT_BASE    0xD0001000
  #elif defined(CONFIG_SPL_BUILD)
  #define CONFIG_SPL_TEXT_BASE    0xff800000
  #endif

(include/config_fallbakcs.h should also be tweaked because some other
parts still reference to CONFIG_SPL_TEXT_BASE)

In the next commit, it will be converted into defconfig like this:

  CONFIG_SPL_TEXT_BASE=0xff800000
  CONFIG_TPL_TEXT_BASE=0xd0001000

Signed-off-by: Masahiro Yamada <yamada.m at jp.panasonic.com>
---

 include/config_fallbacks.h     | 5 +++++
 include/configs/C29XPCIE.h     | 2 +-
 include/configs/P1010RDB.h     | 2 +-
 include/configs/P1022DS.h      | 2 +-
 include/configs/P1_P2_RDB.h    | 2 +-
 include/configs/p1_p2_rdb_pc.h | 2 +-
 6 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index b304a41..11f375c 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -83,4 +83,9 @@
 #define CONFIG_SYS_HZ		1000
 #endif
 
+#ifdef CONFIG_TPL_BUILD
+# undef CONFIG_SPL_TEXT_BASE
+# define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+#endif
+
 #endif	/* __CONFIG_FALLBACKS_H */
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 8ae33a5..51e7fcb 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -38,7 +38,7 @@
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_TPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index c491b50..afd8945 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -119,7 +119,7 @@
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_SPL_TEXT_BASE		0xD0001000
+#define CONFIG_TPL_TEXT_BASE		0xD0001000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 54e2569..4683900 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -90,7 +90,7 @@
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_TPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index c75638a..2867fb5 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -104,7 +104,7 @@
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_TPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 9b58950..0d70ec1 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -218,7 +218,7 @@
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_TPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
-- 
1.9.1