[U-Boot] [PATCH v2 10/12] sf: Update Micron flash params

[Bin Meng]

Explicitly list supported read commands in the flash prarmas table
for Micron flash parts. Update flash sector size to 4KiB as long
as flash supports sector erase (20h) command.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
---
 drivers/mtd/spi/sf_params.c | 46 ++++++++++++++++++++++-----------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index ce98fa9..5ad9e7e 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -65,29 +65,29 @@ const struct spi_flash_params spi_flash_params_table[] = {
 	{"S25FL512S_512K", 0x010220, 0x4f00,   256 * 1024,   256, RD_FULL,		     WR_QPP},
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
-	{"M25P10",	   0x202011, 0x0,	32 * 1024,     4,	0,			  0},
-	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4,	0,			  0},
-	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8,	0,			  0},
-	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16,	0,			  0},
-	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32,	0,			  0},
-	{"M25PE16",	   0x208015, 0x1000,    64 * 1024,    32,	0,			  0},
-	{"M25PX16",	   0x207115, 0x1000,    64 * 1024,    32, RD_EXTN,			  0},
-	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	0,			  0},
-	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	0,			  0},
-	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	0,			  0},
-	{"M25PX64",	   0x207117, 0x0,       64 * 1024,   128,	0,		    SECT_4K},
-	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64, RD_FULL,	   WR_QPP | SECT_4K},
-	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64, RD_FULL,	   WR_QPP | SECT_4K},
-	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128, RD_FULL,	   WR_QPP | SECT_4K},
-	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128, RD_FULL,	   WR_QPP | SECT_4K},
-	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256, RD_FULL,		     WR_QPP},
-	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256, RD_FULL,		     WR_QPP},
-	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512, RD_FULL,	   WR_QPP | SECT_4K},
-	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512, RD_FULL,	   WR_QPP | SECT_4K},
-	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
-	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
-	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
-	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
+	{"M25P10",	   0x202011, 0x0,	32 * 1024,     4, 		     RD_BASC,			     0},
+	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4, 		     RD_BASC,			     0},
+	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8, 		     RD_BASC,			     0},
+	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16, 		     RD_BASC,			     0},
+	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32, 		     RD_BASC,			     0},
+	{"M25PE16",	   0x208015, 0x1000,     4 * 1024,   512, 		     RD_BASC,		       SECT_4K},
+	{"M25PX16",	   0x207115, 0x1000,     4 * 1024,   512, RD_BASC | DUAL_OUTPUT_FAST,		       SECT_4K},
+	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64, 		     RD_BASC,			     0},
+	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128, 		     RD_BASC,			     0},
+	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64, 		     RD_BASC,			     0},
+	{"M25PX64",	   0x207117, 0x0,        4 * 1024,  2048, RD_BASC | DUAL_OUTPUT_FAST,		       SECT_4K},
+	{"N25Q32",	   0x20ba16, 0x0,        4 * 1024,  1024, 		     RD_FULL,	      WR_QPP | SECT_4K},
+	{"N25Q32A",	   0x20bb16, 0x0,        4 * 1024,  1024, 		     RD_FULL,	      WR_QPP | SECT_4K},
+	{"N25Q64",	   0x20ba17, 0x0,        4 * 1024,  2048, 		     RD_FULL,	      WR_QPP | SECT_4K},
+	{"N25Q64A",	   0x20bb17, 0x0,        4 * 1024,  2048, 		     RD_FULL,	      WR_QPP | SECT_4K},
+	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256, 		     RD_FULL,			WR_QPP},
+	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256, 		     RD_FULL,			WR_QPP},
+	{"N25Q256",	   0x20ba19, 0x0,        4 * 1024,  8192, 		     RD_FULL,	      WR_QPP | SECT_4K},
+	{"N25Q256A",	   0x20bb19, 0x0,        4 * 1024,  8192, 		     RD_FULL,	      WR_QPP | SECT_4K},
+	{"N25Q512",	   0x20ba20, 0x0,        4 * 1024, 16384, 		     RD_FULL, WR_QPP | E_FSR | SECT_4K},
+	{"N25Q512A",	   0x20bb20, 0x0,        4 * 1024, 16384, 		     RD_FULL, WR_QPP | E_FSR | SECT_4K},
+	{"N25Q1024",	   0x20ba21, 0x0,        4 * 1024, 32768, 		     RD_FULL, WR_QPP | E_FSR | SECT_4K},
+	{"N25Q1024A",	   0x20bb21, 0x0,        4 * 1024, 32768, 		     RD_FULL, WR_QPP | E_FSR | SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_SST		/* SST */
 	{"SST25VF040B",	   0xbf258d, 0x0,	 4 * 1024,   128, RD_BASC,	    SECT_4K | SST_WP},
-- 
1.8.2.1