[U-Boot] [PATCH 24/39] x86: ivybridge: Enable PCI in early init

[Simon Glass]

Enable PCI so we can access devices that need to be set up before relocation.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/x86/cpu/ivybridge/cpu.c       |  5 +++++
 arch/x86/cpu/pci.c                 | 31 ++++++++++++++++++++++++++++++-
 arch/x86/include/asm/global_data.h |  1 +
 include/configs/chromebook_link.h  | 14 ++++++++++++--
 4 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index a9884ca..06f4d68 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -18,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int arch_cpu_init(void)
 {
+	struct pci_controller *hose;
 	int ret;
 
 	post_code(POST_CPU_INIT);
@@ -27,6 +28,10 @@ int arch_cpu_init(void)
 	if (ret)
 		return ret;
 
+	ret = pci_early_init_hose(&hose);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index a72175d..4035fa0 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -23,7 +23,8 @@ static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev,
 	u8 secondary;
 	hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary);
 	hose->last_busno = max(hose->last_busno, secondary);
-	pci_hose_scan_bus(hose, secondary);
+	if (secondary != 0)
+		pci_hose_scan_bus(hose, secondary);
 }
 
 static struct pci_config_table pci_x86_config_table[] = {
@@ -39,9 +40,33 @@ static void pci_setup_hose(struct pci_controller *hose)
 	hose->first_busno = 0;
 	hose->last_busno = 0;
 
+#ifdef CONFIG_PCI_MEM_BUS
+	/* PCI memory space */
+	pci_set_region(hose->regions + 0,
+		       CONFIG_PCI_MEM_BUS,
+		       CONFIG_PCI_MEM_PHYS,
+		       CONFIG_PCI_MEM_SIZE,
+		       PCI_REGION_MEM);
+
+	/* PCI IO space */
+	pci_set_region(hose->regions + 1,
+		       CONFIG_PCI_IO_BUS,
+		       CONFIG_PCI_IO_PHYS,
+		       CONFIG_PCI_IO_SIZE,
+		       PCI_REGION_IO);
+
+	pci_set_region(hose->regions + 2,
+		       CONFIG_PCI_PREF_BUS,
+		       CONFIG_PCI_PREF_PHYS,
+		       CONFIG_PCI_PREF_SIZE,
+		       PCI_REGION_PREFETCH);
+
+	hose->region_count = 3;
+#else
 	pci_set_region(hose->regions + 0, 0x0, 0x0, 0xffffffff,
 		       PCI_REGION_MEM);
 	hose->region_count = 1;
+#endif
 
 	pci_setup_type1(hose);
 }
@@ -55,6 +80,7 @@ int pci_early_init_hose(struct pci_controller **hosep)
 		return -ENOMEM;
 
 	pci_setup_hose(hose);
+	gd->arch.hose = hose;
 	*hosep = hose;
 
 	return 0;
@@ -64,6 +90,9 @@ void pci_init_board(void)
 {
 	struct pci_controller *hose = &x86_hose;
 
+	/* Stop using the early hose */
+	gd->arch.hose = NULL;
+
 	pci_setup_hose(hose);
 	pci_register_hose(hose);
 
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 9eae228..998053c 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -18,6 +18,7 @@ struct arch_global_data {
 	uint32_t tsc_prev;		/* For show_boot_progress() */
 	void *new_fdt;			/* Relocated FDT */
 	uint32_t bist;			/* Built-in self test value */
+	struct pci_controller *hose;	/* PCI hose for early use */
 };
 
 #endif
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 5e8a747..5290814 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -38,8 +38,6 @@
 #undef CONFIG_ARCH_EARLY_INIT_R
 #undef CONFIG_VIDEO
 #undef CONFIG_CFB_CONSOLE
-#undef CONFIG_SYS_EARLY_PCI_INIT
-#undef CONFIG_PCI
 #undef CONFIG_ICH_SPI
 #undef CONFIG_SPI
 #undef CONFIG_CMD_SPI
@@ -48,6 +46,18 @@
 #undef CONFIG_CMD_USB
 #undef CONFIG_CMD_SCSI
 
+#define CONFIG_PCI_MEM_BUS	0xe0000000
+#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE	0x10000000
+
+#define CONFIG_PCI_PREF_BUS	0xd0000000
+#define CONFIG_PCI_PREF_PHYS	CONFIG_PCI_PREF_BUS
+#define CONFIG_PCI_PREF_SIZE	0x10000000
+
+#define CONFIG_PCI_IO_BUS	0x1000
+#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE	0xefff
+
 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,serial\0" \
 					"stdout=vga,serial\0" \
 					"stderr=vga,serial\0"
-- 
2.1.0.rc2.206.gedb03e5