[U-Boot] [PATCH 16/39] x86: Fix up some missing prototypes
Simon Glass
sjg at chromium.org
Sat Nov 8 20:40:23 CET 2014
On 7 November 2014 03:07, Bin Meng <bmeng.cn at gmail.com> wrote:
> On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass <sjg at chromium.org> wrote:
>> Some functions are missing prototypes. Fix those that are specific to x86.
>>
>> Signed-off-by: Simon Glass <sjg at chromium.org>
>> ---
>>
>> arch/x86/cpu/coreboot/coreboot.c | 4 +---
>> arch/x86/cpu/coreboot/sdram.c | 4 ++--
>> arch/x86/cpu/cpu.c | 3 +--
>> arch/x86/cpu/interrupts.c | 2 +-
>> arch/x86/include/asm/u-boot-x86.h | 9 +++++++++
>> 5 files changed, 14 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
>> index b640f35..c430ab1 100644
>> --- a/arch/x86/cpu/coreboot/coreboot.c
>> +++ b/arch/x86/cpu/coreboot/coreboot.c
>> @@ -95,7 +95,7 @@ int board_eth_init(bd_t *bis)
>> #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
>> #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
>>
>> -int board_final_cleanup(void)
>> +void board_final_cleanup(void)
>> {
>> /* Un-cache the ROM so the kernel has one
>> * more MTRR available.
>> @@ -117,8 +117,6 @@ int board_final_cleanup(void)
>> /* Issue SMI to Coreboot to lock down ME and registers */
>> printf("Finalizing Coreboot\n");
>> outb(0xcb, 0xb2);
>> -
>> - return 0;
>> }
>>
>> void panic_puts(const char *str)
>> diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
>> index ca651c7..342ff30 100644
>> --- a/arch/x86/cpu/coreboot/sdram.c
>> +++ b/arch/x86/cpu/coreboot/sdram.c
>> @@ -14,6 +14,7 @@
>> #include <asm/init_helpers.h>
>> #include <asm/processor.h>
>> #include <asm/sections.h>
>> +#include <asm/zimage.h>
>> #include <asm/arch/sysinfo.h>
>> #include <asm/arch/tables.h>
>>
>> @@ -99,7 +100,7 @@ int dram_init(void)
>> return calculate_relocation_address();
>> }
>>
>> -int dram_init_banksize(void)
>> +void dram_init_banksize(void)
>> {
>> int i, j;
>>
>> @@ -116,5 +117,4 @@ int dram_init_banksize(void)
>> }
>> }
>> }
>> - return 0;
>> }
>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>> index d6ba246..6441dde 100644
>> --- a/arch/x86/cpu/cpu.c
>> +++ b/arch/x86/cpu/cpu.c
>> @@ -197,14 +197,13 @@ asm(".globl generate_gpf\n"
>> "generate_gpf:\n"
>> "ljmp $0x70, $0x47114711\n");
>>
>> -void __reset_cpu(ulong addr)
>> +__weak void reset_cpu(ulong addr)
>> {
>> printf("Resetting using x86 Triple Fault\n");
>> set_vector(13, generate_gpf); /* general protection fault handler */
>> set_vector(8, generate_gpf); /* double fault handler */
>> generate_gpf(); /* start the show */
>> }
>> -void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));
>>
>> int dcache_status(void)
>> {
>> diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
>> index 6f3d85f..51e2c59 100644
>> --- a/arch/x86/cpu/interrupts.c
>> +++ b/arch/x86/cpu/interrupts.c
>> @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
>> "pushl $"#x"\n" \
>> "jmp irq_common_entry\n"
>>
>> -void dump_regs(struct irq_regs *regs)
>> +static void dump_regs(struct irq_regs *regs)
>> {
>> unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
>> unsigned long d0, d1, d2, d3, d6, d7;
>> diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
>> index fdb8a6c..8d5b438 100644
>> --- a/arch/x86/include/asm/u-boot-x86.h
>> +++ b/arch/x86/include/asm/u-boot-x86.h
>> @@ -37,6 +37,15 @@ int cpu_init_interrupts(void);
>> /* board/.../... */
>> int dram_init(void);
>>
>> +int cleanup_before_linux(void);
>> +int x86_cleanup_before_linux(void);
>> +void x86_enable_caches(void);
>> +void x86_disable_caches(void);
>> +int x86_init_cache(void);
>> +void reset_cpu(ulong addr);
>> +ulong board_get_usable_ram_top(ulong total_size);
>> +void dram_init_banksize(void);
>> +
>> void setup_pcat_compatibility(void);
>>
>> void isa_unmap_rom(u32 addr);
>> --
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
Applied to u-boot-x86.
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