[U-Boot] [PATCH v4 1/3] usb:ehci-mx6 add phy mode query function
Peng Fan
Peng.Fan at freescale.com
Mon Nov 10 01:50:39 CET 2014
usb_phy_enable should return status bit, but not phy mode bit, thus
add a new function usb_phy_mode to query the PHY for it's mode and
make usb_phy_enable just return 0 but not 'phy_ctrl & USBPHY_CTRL_OTG_ID'.
Include a new board weak function board_usb_phy_mode. If board code
does not reimplement this function, it just call usb_phy_mode and return
usb_phy_mode's return value. The reason to include such a weak function
is: " SOC OTG core <--connect--> board HOST port, but no pin id for
the board host port, so board can not use usb_phy_mode to return the
phy mode, but define it's own rule."
Signed-off-by: Peng Fan <Peng.Fan at freescale.com>
Signed-off-by: Ye Li <B37916 at freescale.com>
---
Changes v4:
- Take Marek's suggestions, implement usb_phy_mode function and
introduce a weak function board_usb_phy_mode.
- change usb_phy_enable's return value with 0.
- add prototype for board_usb_phy_mode and usb_phy_mode
Changes v3:
- Take Marek's suggestions, replace 'return val & USBPHY_CTRL_OTG_ID' with
this new function like 'return board_usb_phy_mode(index);'
Here board_usb_phy_mode only has one parameter 'index' as board_ehci_power and
board_echi_hcd_init do.
"http://lists.denx.de/pipermail/u-boot/2014-November/194183.html" has detailed
discussion.
Changes v2:
- Introduce a new weak function to let board have a choice to decide which mode
to work at.
drivers/usb/host/ehci-mx6.c | 27 +++++++++++++++++++++++++--
include/usb/ehci-fsl.h | 2 ++
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 9ec5a0a..951dd3b 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -160,7 +160,7 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
__raw_writel(val, phy_ctrl);
- return val & USBPHY_CTRL_OTG_ID;
+ return 0;
}
/* Base address for this IP block is 0x02184800 */
@@ -193,6 +193,28 @@ static void usb_oc_config(int index)
__raw_writel(val, ctrl);
}
+int usb_phy_mode(int port)
+{
+ void __iomem *phy_reg;
+ void __iomem *phy_ctrl;
+ u32 val;
+
+ phy_reg = (void __iomem *)phy_bases[port];
+ phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
+
+ val = __raw_readl(phy_ctrl);
+
+ if (val & USBPHY_CTRL_OTG_ID)
+ return USB_INIT_DEVICE;
+ else
+ return USB_INIT_HOST;
+}
+
+int __weak board_usb_phy_mode(int port)
+{
+ return usb_phy_mode(port);
+}
+
int __weak board_ehci_hcd_init(int port)
{
return 0;
@@ -221,7 +243,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
usb_power_config(index);
usb_oc_config(index);
usb_internal_phy_clock_gate(index, 1);
- type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST;
+ usb_phy_enable(index, ehci);
+ type = board_usb_phy_mode(index);
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr +
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index dd77ad6..22114c1 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -277,7 +277,9 @@ struct usb_ehci {
#define MXC_EHCI_IPPUE_DOWN (1 << 10)
#define MXC_EHCI_IPPUE_UP (1 << 11)
+int usb_phy_mode(int port);
/* Board-specific initialization */
int board_ehci_hcd_init(int port);
+int board_usb_phy_mode(int port);
#endif /* _EHCI_FSL_H */
--
1.8.4
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