[U-Boot] [PATCH 32/39] x86: ivybridge: Perform Intel microcode update on boot

Bin Meng bmeng.cn at gmail.com
Mon Nov 10 03:54:09 CET 2014


Hi Simon,

On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass <sjg at chromium.org> wrote:
> Microcode updates are stored in the device tree. Work through these and
> apply any that are needed.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>  arch/x86/cpu/ivybridge/Makefile                 |   1 +
>  arch/x86/cpu/ivybridge/cpu.c                    |   5 +
>  arch/x86/cpu/ivybridge/microcode_intel.c        | 150 ++++++++++++++++++++++++
>  arch/x86/include/asm/arch-ivybridge/microcode.h |  20 ++++
>  include/fdtdec.h                                |   1 +
>  lib/fdtdec.c                                    |   1 +
>  6 files changed, 178 insertions(+)
>  create mode 100644 arch/x86/cpu/ivybridge/microcode_intel.c
>  create mode 100644 arch/x86/include/asm/arch-ivybridge/microcode.h
>
> diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
> index ce16697..a3ea566 100644
> --- a/arch/x86/cpu/ivybridge/Makefile
> +++ b/arch/x86/cpu/ivybridge/Makefile
> @@ -7,4 +7,5 @@
>  obj-y += car.o
>  obj-y += cpu.o
>  obj-y += lpc.o
> +obj-y += microcode_intel.o
>  obj-y += sdram.o
> diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
> index e73ccb7..bd2660f 100644
> --- a/arch/x86/cpu/ivybridge/cpu.c
> +++ b/arch/x86/cpu/ivybridge/cpu.c
> @@ -19,6 +19,7 @@
>  #include <asm/post.h>
>  #include <asm/processor.h>
>  #include <asm/arch/model_206ax.h>
> +#include <asm/arch/microcode.h>
>  #include <asm/arch/pch.h>
>
>  DECLARE_GLOBAL_DATA_PTR;
> @@ -198,6 +199,10 @@ int print_cpuinfo(void)
>         if (ret)
>                 return ret;
>
> +       ret = microcode_update_intel();
> +       if (ret && ret != -ENOENT && ret != -EEXIST)
> +               return ret;
> +
>         /* Print processor name */
>         name = cpu_get_name(processor_name);
>         printf("CPU:   %s\n", name);
> diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c
> new file mode 100644
> index 0000000..fbb55f2
> --- /dev/null
> +++ b/arch/x86/cpu/ivybridge/microcode_intel.c
> @@ -0,0 +1,150 @@
> +/*
> + * Copyright (c) 2014 Google, Inc
> + * Copyright (C) 2000 Ronald G. Minnich
> + *
> + * Microcode update for Intel PIII and later CPUs

This comment suggests that the code is generic for all Intel CPUs, so
should we move this code to arch/x86/lib?

[snip]

Regards,
Bin


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